NI Vision for LabVIEW

IMAQ FPGA IntegerToColorValue VI

  • Updated2023-02-21
  • 10 minute(s) read
Owning Palette: Color Utilities
Requires: NI Vision Development Module FPGA

Converts colors in the form of an unsigned 32-bit integer into the three colors in the mode.

IMAQ FPGA IntegerToRGB32

Converts colors in the form of an unsigned 32-bit integer into RGB values.

Instance Details

IMAQ FPGA IntegerToRGB32

ci16.gif

U32 Value is a color value encoded as an unsigned 32-bit integer.

cbool.gif

Input Valid specifies whether the next data point has arrived for processing. Wire the Output Valid output of an upstream node to this input to transfer data from the upstream node to this node.

cbool.gif

Ready For Output specifies whether downstream nodes are ready for this node to return a new value. The default is TRUE. Use a Feedback Node to wire the Ready for Input output of a downstream node to this input of the current node.

Note  If this terminal is FALSE during a given cycle, the output valid terminal returns FALSE during that cycle.
inclst.gif

RGB32 Out contains the output color values.

iu8.gif

A is the value of the alpha plane.

iu8.gif

R/H is the red or hue value of the first color plane, depending on the color mode.

iu8.gif

G/S is the green or saturation value of the second color plane, depending on the color mode.

iu8.gif

B/L is the blue or luminance value of the third color plane, depending on the color mode.

ibool.gif

Output Valid returns TRUE if this node has computed a result that downstream nodes can use. Wire this output to the Input Valid input of a downstream node to transfer data from the node to the downstream node.

ibool.gif

Ready for Input returns TRUE if this node is ready to accept new input data. Use a Feedback Node to wire this output to the Ready for Output input of an upstream node.

Note  If this terminal returns FALSE during a given cycle, LabVIEW discards any data that other nodes send to this node during the following cycle. LabVIEW discards this data even if the Input Valid terminal is TRUE during the following cycle.

IMAQ FPGA IntegerToRGB32 Details

Note  Resource estimates are based on a 40 MHz clock.

Virtex-5

Estimated Device Utilization

  • Slice Registers: 106
  • Slice LUTs: 96
  • DSP48s: 0
  • Block RAMs: 0

Estimated Performance

  • Minimum Latency: 1
  • Initiation Interval: 1

Spartan-6

Estimated Device Utilization

  • Slice Registers: 106
  • Slice LUTs: 94
  • DSP48s: 0
  • Block RAMs: 0

Estimated Performance

  • Minimum Latency: 1
  • Initiation Interval: 1

Zynq

Estimated Device Utilization

  • Slice Registers: 106
  • Slice LUTs: 77
  • DSP48s: 0
  • Block RAMs: 0

Estimated Performance

  • Minimum Latency: 1
  • Initiation Interval: 1

Kintex-7

Estimated Device Utilization

  • Slice Registers: 278
  • Slice LUTs: 223
  • DSP48s: 0
  • Block RAMs: 0

Estimated Performance

  • Minimum Latency: 1
  • Initiation Interval: 1

IMAQ FPGA IntegerToRGB32 x8

Converts colors in the form of an unsigned 32-bit integer into RGB values.

Instance Details

IMAQ FPGA IntegerToRGB32 x8

ci16.gif

U32 Value is a color value encoded as an unsigned 32-bit integer.

cbool.gif

Input Valid specifies whether the next data point has arrived for processing. Wire the Output Valid output of an upstream node to this input to transfer data from the upstream node to this node.

cbool.gif

Ready For Output specifies whether downstream nodes are ready for this node to return a new value. The default is TRUE. Use a Feedback Node to wire the Ready for Input output of a downstream node to this input of the current node.

Note  If this terminal is FALSE during a given cycle, the output valid terminal returns FALSE during that cycle.
inclst.gif

RGB32 Out contains the output color values.

iu8.gif

A is the value of the alpha plane.

iu8.gif

R/H is the red or hue value of the first color plane, depending on the color mode.

iu8.gif

G/S is the green or saturation value of the second color plane, depending on the color mode.

iu8.gif

B/L is the blue or luminance value of the third color plane, depending on the color mode.

ibool.gif

Output Valid returns TRUE if this node has computed a result that downstream nodes can use. Wire this output to the Input Valid input of a downstream node to transfer data from the node to the downstream node.

ibool.gif

Ready for Input returns TRUE if this node is ready to accept new input data. Use a Feedback Node to wire this output to the Ready for Output input of an upstream node.

Note  If this terminal returns FALSE during a given cycle, LabVIEW discards any data that other nodes send to this node during the following cycle. LabVIEW discards this data even if the Input Valid terminal is TRUE during the following cycle.

IMAQ FPGA IntegerToRGB32 x8 Details

Note  Resource estimates are based on a 40 MHz clock.

Kintex-7

Estimated Device Utilization

  • Slice Registers: 1136
  • Slice LUTs: 640
  • DSP48s: 0
  • Block RAMs: 0

Estimated Performance

  • Minimum Latency: 1
  • Initiation Interval: 1

IMAQ FPGA IntegerToHSL32

Converts colors in the form of an unsigned 32-bit integer into RGB values.

Instance Details

IMAQ FPGA IntegerToHSL32

ci16.gif

U32 Value is a color value encoded as an unsigned 32-bit integer.

cbool.gif

Input Valid specifies whether the next data point has arrived for processing. Wire the Output Valid output of an upstream node to this input to transfer data from the upstream node to this node.

cbool.gif

Ready For Output specifies whether downstream nodes are ready for this node to return a new value. The default is TRUE. Use a Feedback Node to wire the Ready for Input output of a downstream node to this input of the current node.

Note  If this terminal is FALSE during a given cycle, the output valid terminal returns FALSE during that cycle.
inclst.gif

Color Value contains the output color values.

iu8.gif

A is the value of the alpha plane.

iu8.gif

R/H is the red or hue value of the first color plane, depending on the color mode.

iu8.gif

G/S is the green or saturation value of the second color plane, depending on the color mode.

iu8.gif

B/L is the blue or luminance value of the third color plane, depending on the color mode.

ibool.gif

Output Valid returns TRUE if this node has computed a result that downstream nodes can use. Wire this output to the Input Valid input of a downstream node to transfer data from the node to the downstream node.

ibool.gif

Ready for Input returns TRUE if this node is ready to accept new input data. Use a Feedback Node to wire this output to the Ready for Output input of an upstream node.

Note  If this terminal returns FALSE during a given cycle, LabVIEW discards any data that other nodes send to this node during the following cycle. LabVIEW discards this data even if the Input Valid terminal is TRUE during the following cycle.

IMAQ FPGA IntegerToHSL32 Details

Note  Resource estimates are based on a 40 MHz clock.

Virtex-5

Estimated Device Utilization

  • Slice Registers: 2813
  • Slice LUTs: 3792
  • DSP48s: 15
  • Block RAMs: 0

Estimated Performance

  • Minimum Latency: 37
  • Initiation Interval: 1

Spartan-6

Estimated Device Utilization

  • Slice Registers: 2801
  • Slice LUTs: 3268
  • DSP48s: 27
  • Block RAMs: 0

Estimated Performance

  • Minimum Latency: 37
  • Initiation Interval: 1

Zynq

Estimated Device Utilization

  • Slice Registers: 3418
  • Slice LUTs: 4412
  • DSP48s: 20
  • Block RAMs: 0

Estimated Performance

  • Minimum Latency: 30
  • Initiation Interval: 1

Kintex-7

Estimated Device Utilization

  • Slice Registers: 1326
  • Slice LUTs: 1744
  • DSP48s: 8
  • Block RAMs: 0

Estimated Performance

  • Minimum Latency: 30
  • Initiation Interval: 1

IMAQ FPGA IntegerToHSL32x8

Converts colors in the form of an unsigned 32-bit integer into RGB values.

Instance Details

IMAQ FPGA IntegerToHSL32x8

ci16.gif

U32 Value is a color value encoded as an unsigned 32-bit integer.

cbool.gif

Input Valid specifies whether the next data point has arrived for processing. Wire the Output Valid output of an upstream node to this input to transfer data from the upstream node to this node.

cbool.gif

Ready For Output specifies whether downstream nodes are ready for this node to return a new value. The default is TRUE. Use a Feedback Node to wire the Ready for Input output of a downstream node to this input of the current node.

Note  If this terminal is FALSE during a given cycle, the output valid terminal returns FALSE during that cycle.
inclst.gif

Color Value contains the output color values.

iu8.gif

A is the value of the alpha plane.

iu8.gif

R/H is the red or hue value of the first color plane, depending on the color mode.

iu8.gif

G/S is the green or saturation value of the second color plane, depending on the color mode.

iu8.gif

B/L is the blue or luminance value of the third color plane, depending on the color mode.

ibool.gif

Output Valid returns TRUE if this node has computed a result that downstream nodes can use. Wire this output to the Input Valid input of a downstream node to transfer data from the node to the downstream node.

ibool.gif

Ready for Input returns TRUE if this node is ready to accept new input data. Use a Feedback Node to wire this output to the Ready for Output input of an upstream node.

Note  If this terminal returns FALSE during a given cycle, LabVIEW discards any data that other nodes send to this node during the following cycle. LabVIEW discards this data even if the Input Valid terminal is TRUE during the following cycle.

IMAQ FPGA IntegerToHSL32x8 Details

Note  Resource estimates are based on a 40 MHz clock.

Kintex-7

Estimated Device Utilization

  • Slice Registers: 18745
  • Slice LUTs: 28823
  • DSP48s: 96
  • Block RAMs: 0

Estimated Performance

  • Minimum Latency: 32
  • Initiation Interval: 1