NI Vision for LabVIEW

IMAQ FPGA Histogram VI

  • Updated2023-02-21
  • 42 minute(s) read
Owning Palette: Analysis
Requires: NI Vision Development Module FPGA

Calculates the histogram of an image.

Note  This VI has variable latency, which is dependent on the image size. Plug the Minimum Latency value from the Estimated Performance section into the following formula to determine the total latency.

Total Latency = (((Image Width/8) + 1) x Image Height) + 4

IMAQ FPGA Histogram NoMask U8x1

Calculates the histogram of an image.

Instance Details

Supported Image Types

8-bit unsigned grayscale

IMAQ FPGA Histogram NoMask U8x1

ccclst.gif

Pixel Bus In when Input Valid is TRUE, contains one of the following: valid pixel data, an end of line signal, or an end of image signal.

cu8.gif

Pixel Data is the value of the pixel.

cbool.gif

DV Data valid. Determines whether the Pixel Data element should be use (TRUE) or ignored (FALSE).

cbool.gif

EOL End of line. When TRUE, indicates that the end of the line has been reached.

cbool.gif

EOI End of image. When TRUE, indicates that the end of the image has been reached.

cenum.gif

Data Type is used in the block diagram for determining the type of the Pixel Bus. Unused during processing and gets optimized out of the compiled bit stream.

cbool.gif

Input Valid specifies whether the next data point has arrived for processing. Wire the Output Valid output of an upstream node to this input to transfer data from the upstream node to this node.

cbool.gif

Ready For Output specifies whether downstream nodes are ready for this node to return a new value. The default is TRUE. Use a Feedback Node to wire the Ready for Input output of a downstream node to this input of the current node.

Note  If this terminal is FALSE during a given cycle, the output valid terminal returns FALSE during that cycle.
ifxp.gif

Histogram returns the histogram value of the pixel.

ibool.gif

Output Valid returns TRUE if this node has computed a result that downstream nodes can use. Wire this output to the Input Valid input of a downstream node to transfer data from the node to the downstream node.

ibool.gif

Ready for Input returns TRUE if this node is ready to accept new input data. Use a Feedback Node to wire this output to the Ready for Output input of an upstream node.

Note  If this terminal returns FALSE during a given cycle, LabVIEW discards any data that other nodes send to this node during the following cycle. LabVIEW discards this data even if the Input Valid terminal is TRUE during the following cycle.

IMAQ FPGA Histogram NoMask U8x1 Details

Note  Resource estimates are based on a 40 MHz clock.

Virtex-5

Estimated Device Utilization

  • Slice Registers: 189
  • Slice LUTs: 460
  • DSP48s: 0
  • Block RAMs: 1

Estimated Performance

  • Minimum Latency: 2
  • Initiation Interval: 1

Spartan-6

Estimated Device Utilization

  • Slice Registers: 187
  • Slice LUTs: 406
  • DSP48s: 0
  • Block RAMs: 4

Estimated Performance

  • Minimum Latency: 2
  • Initiation Interval: 1

Zynq

Estimated Device Utilization

  • Slice Registers: 122
  • Slice LUTs: 234
  • DSP48s: 0
  • Block RAMs: 2

Estimated Performance

  • Minimum Latency: 2
  • Initiation Interval: 1

Kintex-7

Estimated Device Utilization

  • Slice Registers: 198
  • Slice LUTs: 319
  • DSP48s: 0
  • Block RAMs: 2

Estimated Performance

  • Minimum Latency: 2
  • Initiation Interval: 1

IMAQ FPGA Histogram NoMask U8x8

Calculates the histogram of an image.

Instance Details

Supported Image Types

8-bit unsigned grayscale

IMAQ FPGA Histogram NoMask U8x8

ccclst.gif

Pixel Bus In when Input Valid is TRUE, contains one of the following: valid pixel data, an end of line signal, or an end of image signal.

cu8.gif

Pixel Data is the value of the pixel.

cbool.gif

DV Data valid. Determines whether the Pixel Data element should be use (TRUE) or ignored (FALSE).

cbool.gif

EOL End of line. When TRUE, indicates that the end of the line has been reached.

cbool.gif

EOI End of image. When TRUE, indicates that the end of the image has been reached.

cenum.gif

Data Type is used in the block diagram for determining the type of the Pixel Bus. Unused during processing and gets optimized out of the compiled bit stream.

cbool.gif

Input Valid specifies whether the next data point has arrived for processing. Wire the Output Valid output of an upstream node to this input to transfer data from the upstream node to this node.

cbool.gif

Ready For Output specifies whether downstream nodes are ready for this node to return a new value. The default is TRUE. Use a Feedback Node to wire the Ready for Input output of a downstream node to this input of the current node.

Note  If this terminal is FALSE during a given cycle, the output valid terminal returns FALSE during that cycle.
ifxp.gif

Histogram returns the histogram value of the pixel.

ibool.gif

Output Valid returns TRUE if this node has computed a result that downstream nodes can use. Wire this output to the Input Valid input of a downstream node to transfer data from the node to the downstream node.

ibool.gif

Ready for Input returns TRUE if this node is ready to accept new input data. Use a Feedback Node to wire this output to the Ready for Output input of an upstream node.

Note  If this terminal returns FALSE during a given cycle, LabVIEW discards any data that other nodes send to this node during the following cycle. LabVIEW discards this data even if the Input Valid terminal is TRUE during the following cycle.

IMAQ FPGA Histogram NoMask U8x8 Details

Note  Resource estimates are based on a 40 MHz clock.

Kintex-7

Estimated Device Utilization

  • Slice Registers: 1131
  • Slice LUTs: 2333
  • DSP48s: 0
  • Block RAMs: 16

Estimated Performance

  • Minimum Latency: 1
  • Initiation Interval: 1

IMAQ FPGA Histogram with Range NoMask U8x1

Calculates the histogram of an image.

Instance Details

Supported Image Types

8-bit unsigned grayscale

IMAQ FPGA Histogram with Range NoMask U8x1

cu16.gif

Number of Classes specifies the number of classes used to classify the pixels. The number of obtained classes differs from the specified amount in a case in which the minimum and maximum boundaries are overshot in the Interval Range. It is advised to specify a number of classes that is a power of two (for example, 2, 4, or 8). The default value is 256, which is designed for 8-bit images. This value gives a uniform class distribution or one class for each grayscale intensity in an 8-bit image.

ccclst.gif

Pixel Bus In when Input Valid is TRUE, contains one of the following: valid pixel data, an end of line signal, or an end of image signal.

cu8.gif

Pixel Data is the value of the pixel.

cbool.gif

DV Data valid. Determines whether the Pixel Data element should be use (TRUE) or ignored (FALSE).

cbool.gif

EOL End of line. When TRUE, indicates that the end of the line has been reached.

cbool.gif

EOI End of image. When TRUE, indicates that the end of the image has been reached.

cenum.gif

Data Type is used in the block diagram for determining the type of the Pixel Bus. Unused during processing and gets optimized out of the compiled bit stream.

cnclst.gif

Interval Range is a cluster specifying the minimum and maximum boundaries for the histogram calculation. Only those pixels having a value that falls in this range are taken into account by the histogram calculation. This cluster is composed of the following elements:

cu8.gif

Minimum is the minimum interval value. The default value of (0, 0) ensures that the real minimum value is determined by the source image.

cu8.gif

Maximum is the maximum interval value. The default value of (0, 0) ensures that the real maximum value is determined by the source image.

cbool.gif

Input Valid specifies whether the next data point has arrived for processing. Wire the Output Valid output of an upstream node to this input to transfer data from the upstream node to this node.

cbool.gif

Ready For Output specifies whether downstream nodes are ready for this node to return a new value. The default is TRUE. Use a Feedback Node to wire the Ready for Input output of a downstream node to this input of the current node.

Note  If this terminal is FALSE during a given cycle, the output valid terminal returns FALSE during that cycle.
ifxp.gif

Histogram returns the histogram value of the pixel.

ibool.gif

Output Valid returns TRUE if this node has computed a result that downstream nodes can use. Wire this output to the Input Valid input of a downstream node to transfer data from the node to the downstream node.

ibool.gif

Ready for Input returns TRUE if this node is ready to accept new input data. Use a Feedback Node to wire this output to the Ready for Output input of an upstream node.

Note  If this terminal returns FALSE during a given cycle, LabVIEW discards any data that other nodes send to this node during the following cycle. LabVIEW discards this data even if the Input Valid terminal is TRUE during the following cycle.

IMAQ FPGA Histogram with Range NoMask U8x1 Details

Note  Resource estimates are based on a 40 MHz clock.

Virtex-5

Estimated Device Utilization

  • Slice Registers: 836
  • Slice LUTs: 1390
  • DSP48s: 1
  • Block RAMs: 1

Estimated Performance

  • Minimum Latency: 17
  • Initiation Interval: 1

Spartan-6

Estimated Device Utilization

  • Slice Registers: 820
  • Slice LUTs: 1376
  • DSP48s: 1
  • Block RAMs: 4

Estimated Performance

  • Minimum Latency: 17
  • Initiation Interval: 1

Zynq

Estimated Device Utilization

  • Slice Registers: 943
  • Slice LUTs: 1160
  • DSP48s: 1
  • Block RAMs: 2

Estimated Performance

  • Minimum Latency: 13
  • Initiation Interval: 1

Kintex-7

Estimated Device Utilization

  • Slice Registers: 919
  • Slice LUTs: 1105
  • DSP48s: 1
  • Block RAMs: 2

Estimated Performance

  • Minimum Latency: 13
  • Initiation Interval: 1

IMAQ FPGA Histogram with Range NoMask U8x8

Calculates the histogram of an image.

Instance Details

Supported Image Types

8-bit unsigned grayscale

IMAQ FPGA Histogram with Range NoMask U8x8

cu16.gif

Number of Classes specifies the number of classes used to classify the pixels. The number of obtained classes differs from the specified amount in a case in which the minimum and maximum boundaries are overshot in the Interval Range. It is advised to specify a number of classes that is a power of two (for example, 2, 4, or 8). The default value is 256, which is designed for 8-bit images. This value gives a uniform class distribution or one class for each grayscale intensity in an 8-bit image.

ccclst.gif

Pixel Bus In when Input Valid is TRUE, contains one of the following: valid pixel data, an end of line signal, or an end of image signal.

cu8.gif

Pixel Data is the value of the pixel.

cbool.gif

DV Data valid. Determines whether the Pixel Data element should be use (TRUE) or ignored (FALSE).

cbool.gif

EOL End of line. When TRUE, indicates that the end of the line has been reached.

cbool.gif

EOI End of image. When TRUE, indicates that the end of the image has been reached.

cenum.gif

Data Type is used in the block diagram for determining the type of the Pixel Bus. Unused during processing and gets optimized out of the compiled bit stream.

cnclst.gif

Interval Range is a cluster specifying the minimum and maximum boundaries for the histogram calculation. Only those pixels having a value that falls in this range are taken into account by the histogram calculation. This cluster is composed of the following elements:

cu8.gif

Minimum is the minimum interval value. The default value of (0, 0) ensures that the real minimum value is determined by the source image.

cu8.gif

Maximum is the maximum interval value. The default value of (0, 0) ensures that the real maximum value is determined by the source image.

cbool.gif

Input Valid specifies whether the next data point has arrived for processing. Wire the Output Valid output of an upstream node to this input to transfer data from the upstream node to this node.

cbool.gif

Ready For Output specifies whether downstream nodes are ready for this node to return a new value. The default is TRUE. Use a Feedback Node to wire the Ready for Input output of a downstream node to this input of the current node.

Note  If this terminal is FALSE during a given cycle, the output valid terminal returns FALSE during that cycle.
ifxp.gif

Histogram returns the histogram value of the pixel.

ibool.gif

Output Valid returns TRUE if this node has computed a result that downstream nodes can use. Wire this output to the Input Valid input of a downstream node to transfer data from the node to the downstream node.

ibool.gif

Ready for Input returns TRUE if this node is ready to accept new input data. Use a Feedback Node to wire this output to the Ready for Output input of an upstream node.

Note  If this terminal returns FALSE during a given cycle, LabVIEW discards any data that other nodes send to this node during the following cycle. LabVIEW discards this data even if the Input Valid terminal is TRUE during the following cycle.

IMAQ FPGA Histogram with Range NoMask U8x8 Details

Note  Resource estimates are based on a 40 MHz clock.

Kintex-7

Estimated Device Utilization

  • Slice Registers: 2830
  • Slice LUTs: 4367
  • DSP48s: 16
  • Block RAMs: 16

Estimated Performance

  • Minimum Latency: 17
  • Initiation Interval: 1

IMAQ FPGA Histogram with Range NoMask U16x1

Calculates the histogram of an image.

Instance Details

Supported Image Types

16-bit unsigned grayscale

IMAQ FPGA Histogram with Range NoMask U16x1

cu16.gif

Number of Classes specifies the number of classes used to classify the pixels. The number of obtained classes differs from the specified amount in a case in which the minimum and maximum boundaries are overshot in the Interval Range. It is advised to specify a number of classes that is a power of two (for example, 2, 4, or 8). The default value is 256, which is designed for 8-bit images. This value gives a uniform class distribution or one class for each grayscale intensity in an 8-bit image.

ccclst.gif

Pixel Bus In when Input Valid is TRUE, contains one of the following: valid pixel data, an end of line signal, or an end of image signal.

cu16.gif

Pixel Data is the value of the pixel.

cbool.gif

DV Data valid. Determines whether the Pixel Data element should be use (TRUE) or ignored (FALSE).

cbool.gif

EOL End of line. When TRUE, indicates that the end of the line has been reached.

cbool.gif

EOI End of image. When TRUE, indicates that the end of the image has been reached.

cenum.gif

Data Type is used in the block diagram for determining the type of the Pixel Bus. Unused during processing and gets optimized out of the compiled bit stream.

cnclst.gif

Interval Range is a cluster specifying the minimum and maximum boundaries for the histogram calculation. Only those pixels having a value that falls in this range are taken into account by the histogram calculation. This cluster is composed of the following elements:

cu16.gif

Minimum is the minimum interval value. The default value of 0 ensures that the real minimum value is determined by the source image.

cu16.gif

Maximum is the maximum interval value. The default value of 0 ensures that the real maximum value is determined by the source image.

cbool.gif

Input Valid specifies whether the next data point has arrived for processing. Wire the Output Valid output of an upstream node to this input to transfer data from the upstream node to this node.

cbool.gif

Ready For Output specifies whether downstream nodes are ready for this node to return a new value. The default is TRUE. Use a Feedback Node to wire the Ready for Input output of a downstream node to this input of the current node.

Note  If this terminal is FALSE during a given cycle, the output valid terminal returns FALSE during that cycle.
ifxp.gif

Histogram returns the histogram value of the pixel.

ibool.gif

Output Valid returns TRUE if this node has computed a result that downstream nodes can use. Wire this output to the Input Valid input of a downstream node to transfer data from the node to the downstream node.

ibool.gif

Ready for Input returns TRUE if this node is ready to accept new input data. Use a Feedback Node to wire this output to the Ready for Output input of an upstream node.

Note  If this terminal returns FALSE during a given cycle, LabVIEW discards any data that other nodes send to this node during the following cycle. LabVIEW discards this data even if the Input Valid terminal is TRUE during the following cycle.

IMAQ FPGA Histogram with Range NoMask U16x1 Details

Note  Resource estimates are based on a 40 MHz clock.

Virtex-5

Estimated Device Utilization

  • Slice Registers: 1312
  • Slice LUTs: 1841
  • DSP48s: 1
  • Block RAMs: 1

Estimated Performance

  • Minimum Latency: 20
  • Initiation Interval: 1

Spartan-6

Estimated Device Utilization

  • Slice Registers: 1286
  • Slice LUTs: 1915
  • DSP48s: 2
  • Block RAMs: 4

Estimated Performance

  • Minimum Latency: 20
  • Initiation Interval: 1

Zynq

Estimated Device Utilization

  • Slice Registers: 1278
  • Slice LUTs: 1679
  • DSP48s: 1
  • Block RAMs: 2

Estimated Performance

  • Minimum Latency: 14
  • Initiation Interval: 1

Kintex-7

Estimated Device Utilization

  • Slice Registers: 1828
  • Slice LUTs: 2056
  • DSP48s: 4
  • Block RAMs: 2

Estimated Performance

  • Minimum Latency: 14
  • Initiation Interval: 1

IMAQ FPGA Histogram with Range NoMask U16x8

Calculates the histogram of an image.

Instance Details

Supported Image Types

16-bit unsigned grayscale

IMAQ FPGA Histogram with Range NoMask U16x8

cu16.gif

Number of Classes specifies the number of classes used to classify the pixels. The number of obtained classes differs from the specified amount in a case in which the minimum and maximum boundaries are overshot in the Interval Range. It is advised to specify a number of classes that is a power of two (for example, 2, 4, or 8). The default value is 256, which is designed for 8-bit images. This value gives a uniform class distribution or one class for each grayscale intensity in an 8-bit image.

ccclst.gif

Pixel Bus In when Input Valid is TRUE, contains one of the following: valid pixel data, an end of line signal, or an end of image signal.

cu16.gif

Pixel Data is the value of the pixel.

cbool.gif

DV Data valid. Determines whether the Pixel Data element should be use (TRUE) or ignored (FALSE).

cbool.gif

EOL End of line. When TRUE, indicates that the end of the line has been reached.

cbool.gif

EOI End of image. When TRUE, indicates that the end of the image has been reached.

cenum.gif

Data Type is used in the block diagram for determining the type of the Pixel Bus. Unused during processing and gets optimized out of the compiled bit stream.

cnclst.gif

Interval Range is a cluster specifying the minimum and maximum boundaries for the histogram calculation. Only those pixels having a value that falls in this range are taken into account by the histogram calculation. This cluster is composed of the following elements:

cu16.gif

Minimum is the minimum interval value. The default value of 0 ensures that the real minimum value is determined by the source image.

cu16.gif

Maximum is the maximum interval value. The default value of 0 ensures that the real maximum value is determined by the source image.

cbool.gif

Input Valid specifies whether the next data point has arrived for processing. Wire the Output Valid output of an upstream node to this input to transfer data from the upstream node to this node.

cbool.gif

Ready For Output specifies whether downstream nodes are ready for this node to return a new value. The default is TRUE. Use a Feedback Node to wire the Ready for Input output of a downstream node to this input of the current node.

Note  If this terminal is FALSE during a given cycle, the output valid terminal returns FALSE during that cycle.
ifxp.gif

Histogram returns the histogram value of the pixel.

ibool.gif

Output Valid returns TRUE if this node has computed a result that downstream nodes can use. Wire this output to the Input Valid input of a downstream node to transfer data from the node to the downstream node.

ibool.gif

Ready for Input returns TRUE if this node is ready to accept new input data. Use a Feedback Node to wire this output to the Ready for Output input of an upstream node.

Note  If this terminal returns FALSE during a given cycle, LabVIEW discards any data that other nodes send to this node during the following cycle. LabVIEW discards this data even if the Input Valid terminal is TRUE during the following cycle.

IMAQ FPGA Histogram with Range NoMask U16x8 Details

Note  Resource estimates are based on a 40 MHz clock.

Kintex-7

Estimated Device Utilization

  • Slice Registers: 3123
  • Slice LUTs: 4711
  • DSP48s: 16
  • Block RAMs: 16

Estimated Performance

  • Minimum Latency: 24
  • Initiation Interval: 1

IMAQ FPGA Histogram U8x1

Calculates the histogram of an image.

Instance Details

Supported Image Types

8-bit unsigned grayscale

IMAQ FPGA Histogram U8x1

ccclst.gif

Pixel Bus In when Input Valid is TRUE, contains one of the following: valid pixel data, an end of line signal, or an end of image signal.

cu8.gif

Pixel Data is the value of the pixel.

cbool.gif

DV Data valid. Determines whether the Pixel Data element should be use (TRUE) or ignored (FALSE).

cbool.gif

EOL End of line. When TRUE, indicates that the end of the line has been reached.

cbool.gif

EOI End of image. When TRUE, indicates that the end of the image has been reached.

cenum.gif

Data Type is used in the block diagram for determining the type of the Pixel Bus. Unused during processing and gets optimized out of the compiled bit stream.

ccclst.gif

Mask Pixel Bus In is an image that specifies the region of the image that will be copied. Only pixels in Pixel Bus In that correspond to a non-zero pixel in the mask image are copied. All other pixels are set to 0.

cbool.gif

Pixel Data is the value of the pixel.

cbool.gif

DV Data valid. Determines whether the Pixel Data element should be use (TRUE) or ignored (FALSE).

cbool.gif

EOL End of line. When TRUE, indicates that the end of the line has been reached.

cbool.gif

EOI End of image. When TRUE, indicates that the end of the image has been reached.

cenum.gif

Data Type is used in the block diagram for determining the type of the Pixel Bus. Unused during processing and gets optimized out of the compiled bit stream.

cbool.gif

Input Valid specifies whether the next data point has arrived for processing. Wire the Output Valid output of an upstream node to this input to transfer data from the upstream node to this node.

cbool.gif

Ready For Output specifies whether downstream nodes are ready for this node to return a new value. The default is TRUE. Use a Feedback Node to wire the Ready for Input output of a downstream node to this input of the current node.

Note  If this terminal is FALSE during a given cycle, the output valid terminal returns FALSE during that cycle.
ifxp.gif

Histogram returns the histogram value of the pixel.

ibool.gif

Output Valid returns TRUE if this node has computed a result that downstream nodes can use. Wire this output to the Input Valid input of a downstream node to transfer data from the node to the downstream node.

ibool.gif

Ready for Input returns TRUE if this node is ready to accept new input data. Use a Feedback Node to wire this output to the Ready for Output input of an upstream node.

Note  If this terminal returns FALSE during a given cycle, LabVIEW discards any data that other nodes send to this node during the following cycle. LabVIEW discards this data even if the Input Valid terminal is TRUE during the following cycle.

IMAQ FPGA Histogram U8x1 Details

Note  Resource estimates are based on a 40 MHz clock.

Virtex-5

Estimated Device Utilization

  • Slice Registers: 209
  • Slice LUTs: 472
  • DSP48s: 0
  • Block RAMs: 1

Estimated Performance

  • Minimum Latency: 2
  • Initiation Interval: 1

Spartan-6

Estimated Device Utilization

  • Slice Registers: 206
  • Slice LUTs: 417
  • DSP48s: 0
  • Block RAMs: 4

Estimated Performance

  • Minimum Latency: 2
  • Initiation Interval: 1

Zynq

Estimated Device Utilization

  • Slice Registers: 142
  • Slice LUTs: 241
  • DSP48s: 0
  • Block RAMs: 2

Estimated Performance

  • Minimum Latency: 2
  • Initiation Interval: 1

Kintex-7

Estimated Device Utilization

  • Slice Registers: 218
  • Slice LUTs: 330
  • DSP48s: 0
  • Block RAMs: 2

Estimated Performance

  • Minimum Latency: 2
  • Initiation Interval: 1

IMAQ FPGA Histogram U8x8

Calculates the histogram of an image.

Instance Details

Supported Image Types

8-bit unsigned grayscale

IMAQ FPGA Histogram U8x8

ccclst.gif

Pixel Bus In when Input Valid is TRUE, contains one of the following: valid pixel data, an end of line signal, or an end of image signal.

cu8.gif

Pixel Data is the value of the pixel.

cbool.gif

DV Data valid. Determines whether the Pixel Data element should be use (TRUE) or ignored (FALSE).

cbool.gif

EOL End of line. When TRUE, indicates that the end of the line has been reached.

cbool.gif

EOI End of image. When TRUE, indicates that the end of the image has been reached.

cenum.gif

Data Type is used in the block diagram for determining the type of the Pixel Bus. Unused during processing and gets optimized out of the compiled bit stream.

ccclst.gif

Mask Pixel Bus In is an image that specifies the region of the image that will be copied. Only pixels in Pixel Bus In that correspond to a non-zero pixel in the mask image are copied. All other pixels are set to 0.

cbool.gif

Pixel Data is the value of the pixel.

cbool.gif

DV Data valid. Determines whether the Pixel Data element should be use (TRUE) or ignored (FALSE).

cbool.gif

EOL End of line. When TRUE, indicates that the end of the line has been reached.

cbool.gif

EOI End of image. When TRUE, indicates that the end of the image has been reached.

cenum.gif

Data Type is used in the block diagram for determining the type of the Pixel Bus. Unused during processing and gets optimized out of the compiled bit stream.

cbool.gif

Input Valid specifies whether the next data point has arrived for processing. Wire the Output Valid output of an upstream node to this input to transfer data from the upstream node to this node.

cbool.gif

Ready For Output specifies whether downstream nodes are ready for this node to return a new value. The default is TRUE. Use a Feedback Node to wire the Ready for Input output of a downstream node to this input of the current node.

Note  If this terminal is FALSE during a given cycle, the output valid terminal returns FALSE during that cycle.
ifxp.gif

Histogram returns the histogram value of the pixel.

ibool.gif

Output Valid returns TRUE if this node has computed a result that downstream nodes can use. Wire this output to the Input Valid input of a downstream node to transfer data from the node to the downstream node.

ibool.gif

Ready for Input returns TRUE if this node is ready to accept new input data. Use a Feedback Node to wire this output to the Ready for Output input of an upstream node.

Note  If this terminal returns FALSE during a given cycle, LabVIEW discards any data that other nodes send to this node during the following cycle. LabVIEW discards this data even if the Input Valid terminal is TRUE during the following cycle.

IMAQ FPGA Histogram U8x8 Details

Note  Resource estimates are based on a 40 MHz clock.

Kintex-7

Estimated Device Utilization

  • Slice Registers: 1165
  • Slice LUTs: 2364
  • DSP48s: 0
  • Block RAMs: 16

Estimated Performance

  • Minimum Latency: 1
  • Initiation Interval: 1

IMAQ FPGA Histogram with Range U8x1

Calculates the histogram of an image.

Instance Details

Supported Image Types

8-bit unsigned grayscale

IMAQ FPGA Histogram with Range U8x1

cu16.gif

Number of Classes specifies the number of classes used to classify the pixels. The number of obtained classes differs from the specified amount in a case in which the minimum and maximum boundaries are overshot in the Interval Range. It is advised to specify a number of classes that is a power of two (for example, 2, 4, or 8). The default value is 256, which is designed for 8-bit images. This value gives a uniform class distribution or one class for each grayscale intensity in an 8-bit image.

ccclst.gif

Pixel Bus In when Input Valid is TRUE, contains one of the following: valid pixel data, an end of line signal, or an end of image signal.

cu8.gif

Pixel Data is the value of the pixel.

cbool.gif

DV Data valid. Determines whether the Pixel Data element should be use (TRUE) or ignored (FALSE).

cbool.gif

EOL End of line. When TRUE, indicates that the end of the line has been reached.

cbool.gif

EOI End of image. When TRUE, indicates that the end of the image has been reached.

cenum.gif

Data Type is used in the block diagram for determining the type of the Pixel Bus. Unused during processing and gets optimized out of the compiled bit stream.

ccclst.gif

Mask Pixel Bus In is an image that specifies the region of the image that will be copied. Only pixels in Pixel Bus In that correspond to a non-zero pixel in the mask image are copied. All other pixels are set to 0.

cbool.gif

Pixel Data is the value of the pixel.

cbool.gif

DV Data valid. Determines whether the Pixel Data element should be use (TRUE) or ignored (FALSE).

cbool.gif

EOL End of line. When TRUE, indicates that the end of the line has been reached.

cbool.gif

EOI End of image. When TRUE, indicates that the end of the image has been reached.

cenum.gif

Data Type is used in the block diagram for determining the type of the Pixel Bus. Unused during processing and gets optimized out of the compiled bit stream.

cnclst.gif

Interval Range is a cluster specifying the minimum and maximum boundaries for the histogram calculation. Only those pixels having a value that falls in this range are taken into account by the histogram calculation. This cluster is composed of the following elements:

cu8.gif

Minimum is the minimum interval value. The default value of (0, 0) ensures that the real minimum value is determined by the source image.

cu8.gif

Maximum is the maximum interval value. The default value of (0, 0) ensures that the real maximum value is determined by the source image.

cbool.gif

Input Valid specifies whether the next data point has arrived for processing. Wire the Output Valid output of an upstream node to this input to transfer data from the upstream node to this node.

cbool.gif

Ready For Output specifies whether downstream nodes are ready for this node to return a new value. The default is TRUE. Use a Feedback Node to wire the Ready for Input output of a downstream node to this input of the current node.

Note  If this terminal is FALSE during a given cycle, the output valid terminal returns FALSE during that cycle.
ifxp.gif

Histogram returns the histogram value of the pixel.

ibool.gif

Output Valid returns TRUE if this node has computed a result that downstream nodes can use. Wire this output to the Input Valid input of a downstream node to transfer data from the node to the downstream node.

ibool.gif

Ready for Input returns TRUE if this node is ready to accept new input data. Use a Feedback Node to wire this output to the Ready for Output input of an upstream node.

Note  If this terminal returns FALSE during a given cycle, LabVIEW discards any data that other nodes send to this node during the following cycle. LabVIEW discards this data even if the Input Valid terminal is TRUE during the following cycle.

IMAQ FPGA Histogram with Range U8x1 Details

Note  Resource estimates are based on a 40 MHz clock.

Virtex-5

Estimated Device Utilization

  • Slice Registers: 1288
  • Slice LUTs: 1742
  • DSP48s: 1
  • Block RAMs: 1

Estimated Performance

  • Minimum Latency: 17
  • Initiation Interval: 1

Spartan-6

Estimated Device Utilization

  • Slice Registers: 1044
  • Slice LUTs: 1672
  • DSP48s: 1
  • Block RAMs: 5

Estimated Performance

  • Minimum Latency: 17
  • Initiation Interval: 1

Zynq

Estimated Device Utilization

  • Slice Registers: 1404
  • Slice LUTs: 1419
  • DSP48s: 1
  • Block RAMs: 3

Estimated Performance

  • Minimum Latency: 13
  • Initiation Interval: 1

Kintex-7

Estimated Device Utilization

  • Slice Registers: 939
  • Slice LUTs: 1118
  • DSP48s: 1
  • Block RAMs: 2

Estimated Performance

  • Minimum Latency: 13
  • Initiation Interval: 1

IMAQ FPGA Histogram with Range U8x8

Calculates the histogram of an image.

Instance Details

Supported Image Types

8-bit unsigned grayscale

IMAQ FPGA Histogram with Range U8x8

cu16.gif

Number of Classes specifies the number of classes used to classify the pixels. The number of obtained classes differs from the specified amount in a case in which the minimum and maximum boundaries are overshot in the Interval Range. It is advised to specify a number of classes that is a power of two (for example, 2, 4, or 8). The default value is 256, which is designed for 8-bit images. This value gives a uniform class distribution or one class for each grayscale intensity in an 8-bit image.

ccclst.gif

Pixel Bus In when Input Valid is TRUE, contains one of the following: valid pixel data, an end of line signal, or an end of image signal.

cu8.gif

Pixel Data is the value of the pixel.

cbool.gif

DV Data valid. Determines whether the Pixel Data element should be use (TRUE) or ignored (FALSE).

cbool.gif

EOL End of line. When TRUE, indicates that the end of the line has been reached.

cbool.gif

EOI End of image. When TRUE, indicates that the end of the image has been reached.

cenum.gif

Data Type is used in the block diagram for determining the type of the Pixel Bus. Unused during processing and gets optimized out of the compiled bit stream.

ccclst.gif

Mask Pixel Bus In is an image that specifies the region of the image that will be copied. Only pixels in Pixel Bus In that correspond to a non-zero pixel in the mask image are copied. All other pixels are set to 0.

cbool.gif

Pixel Data is the value of the pixel.

cbool.gif

DV Data valid. Determines whether the Pixel Data element should be use (TRUE) or ignored (FALSE).

cbool.gif

EOL End of line. When TRUE, indicates that the end of the line has been reached.

cbool.gif

EOI End of image. When TRUE, indicates that the end of the image has been reached.

cenum.gif

Data Type is used in the block diagram for determining the type of the Pixel Bus. Unused during processing and gets optimized out of the compiled bit stream.

cnclst.gif

Interval Range is a cluster specifying the minimum and maximum boundaries for the histogram calculation. Only those pixels having a value that falls in this range are taken into account by the histogram calculation. This cluster is composed of the following elements:

cu8.gif

Minimum is the minimum interval value. The default value of (0, 0) ensures that the real minimum value is determined by the source image.

cu8.gif

Maximum is the maximum interval value. The default value of (0, 0) ensures that the real maximum value is determined by the source image.

cbool.gif

Input Valid specifies whether the next data point has arrived for processing. Wire the Output Valid output of an upstream node to this input to transfer data from the upstream node to this node.

cbool.gif

Ready For Output specifies whether downstream nodes are ready for this node to return a new value. The default is TRUE. Use a Feedback Node to wire the Ready for Input output of a downstream node to this input of the current node.

Note  If this terminal is FALSE during a given cycle, the output valid terminal returns FALSE during that cycle.
ifxp.gif

Histogram returns the histogram value of the pixel.

ibool.gif

Output Valid returns TRUE if this node has computed a result that downstream nodes can use. Wire this output to the Input Valid input of a downstream node to transfer data from the node to the downstream node.

ibool.gif

Ready for Input returns TRUE if this node is ready to accept new input data. Use a Feedback Node to wire this output to the Ready for Output input of an upstream node.

Note  If this terminal returns FALSE during a given cycle, LabVIEW discards any data that other nodes send to this node during the following cycle. LabVIEW discards this data even if the Input Valid terminal is TRUE during the following cycle.

IMAQ FPGA Histogram with Range U8x8 Details

Note  Resource estimates are based on a 40 MHz clock.

Kintex-7

Estimated Device Utilization

  • Slice Registers: 3007
  • Slice LUTs: 4592
  • DSP48s: 16
  • Block RAMs: 16

Estimated Performance

  • Minimum Latency: 17
  • Initiation Interval: 1

IMAQ FPGA Histogram with Range U16x1

Calculates the histogram of an image.

Instance Details

Supported Image Types

16-bit unsigned grayscale

IMAQ FPGA Histogram with Range U16x1

cu16.gif

Number of Classes specifies the number of classes used to classify the pixels. The number of obtained classes differs from the specified amount in a case in which the minimum and maximum boundaries are overshot in the Interval Range. It is advised to specify a number of classes that is a power of two (for example, 2, 4, or 8). The default value is 256, which is designed for 8-bit images. This value gives a uniform class distribution or one class for each grayscale intensity in an 8-bit image.

ccclst.gif

Pixel Bus In when Input Valid is TRUE, contains one of the following: valid pixel data, an end of line signal, or an end of image signal.

cu16.gif

Pixel Data is the value of the pixel.

cbool.gif

DV Data valid. Determines whether the Pixel Data element should be use (TRUE) or ignored (FALSE).

cbool.gif

EOL End of line. When TRUE, indicates that the end of the line has been reached.

cbool.gif

EOI End of image. When TRUE, indicates that the end of the image has been reached.

cenum.gif

Data Type is used in the block diagram for determining the type of the Pixel Bus. Unused during processing and gets optimized out of the compiled bit stream.

ccclst.gif

Mask Pixel Bus In is an image that specifies the region of the image that will be copied. Only pixels in Pixel Bus In that correspond to a non-zero pixel in the mask image are copied. All other pixels are set to 0.

cbool.gif

Pixel Data is the value of the pixel.

cbool.gif

DV Data valid. Determines whether the Pixel Data element should be use (TRUE) or ignored (FALSE).

cbool.gif

EOL End of line. When TRUE, indicates that the end of the line has been reached.

cbool.gif

EOI End of image. When TRUE, indicates that the end of the image has been reached.

cenum.gif

Data Type is used in the block diagram for determining the type of the Pixel Bus. Unused during processing and gets optimized out of the compiled bit stream.

cnclst.gif

Interval Range is a cluster specifying the minimum and maximum boundaries for the histogram calculation. Only those pixels having a value that falls in this range are taken into account by the histogram calculation. This cluster is composed of the following elements:

cu16.gif

Minimum is the minimum interval value. The default value of 0 ensures that the real minimum value is determined by the source image.

cu16.gif

Maximum is the maximum interval value. The default value of 0 ensures that the real maximum value is determined by the source image.

cbool.gif

Input Valid specifies whether the next data point has arrived for processing. Wire the Output Valid output of an upstream node to this input to transfer data from the upstream node to this node.

cbool.gif

Ready For Output specifies whether downstream nodes are ready for this node to return a new value. The default is TRUE. Use a Feedback Node to wire the Ready for Input output of a downstream node to this input of the current node.

Note  If this terminal is FALSE during a given cycle, the output valid terminal returns FALSE during that cycle.
ifxp.gif

Histogram returns the histogram value of the pixel.

ibool.gif

Output Valid returns TRUE if this node has computed a result that downstream nodes can use. Wire this output to the Input Valid input of a downstream node to transfer data from the node to the downstream node.

ibool.gif

Ready for Input returns TRUE if this node is ready to accept new input data. Use a Feedback Node to wire this output to the Ready for Output input of an upstream node.

Note  If this terminal returns FALSE during a given cycle, LabVIEW discards any data that other nodes send to this node during the following cycle. LabVIEW discards this data even if the Input Valid terminal is TRUE during the following cycle.

IMAQ FPGA Histogram with Range U16x1 Details

Note  Resource estimates are based on a 40 MHz clock.

Virtex-5

Estimated Device Utilization

  • Slice Registers: 1772
  • Slice LUTs: 2215
  • DSP48s: 1
  • Block RAMs: 1

Estimated Performance

  • Minimum Latency: 20
  • Initiation Interval: 1

Spartan-6

Estimated Device Utilization

  • Slice Registers: 1518
  • Slice LUTs: 2238
  • DSP48s: 2
  • Block RAMs: 6

Estimated Performance

  • Minimum Latency: 20
  • Initiation Interval: 1

Zynq

Estimated Device Utilization

  • Slice Registers: 1746
  • Slice LUTs: 1922
  • DSP48s: 1
  • Block RAMs: 3

Estimated Performance

  • Minimum Latency: 14
  • Initiation Interval: 1

Kintex-7

Estimated Device Utilization

  • Slice Registers: 1848
  • Slice LUTs: 2083
  • DSP48s: 4
  • Block RAMs: 2

Estimated Performance

  • Minimum Latency: 14
  • Initiation Interval: 1

IMAQ FPGA Histogram with Range U16x8

Calculates the histogram of an image.

Instance Details

Supported Image Types

16-bit unsigned grayscale

IMAQ FPGA Histogram with Range U16x8

cu16.gif

Number of Classes specifies the number of classes used to classify the pixels. The number of obtained classes differs from the specified amount in a case in which the minimum and maximum boundaries are overshot in the Interval Range. It is advised to specify a number of classes that is a power of two (for example, 2, 4, or 8). The default value is 256, which is designed for 8-bit images. This value gives a uniform class distribution or one class for each grayscale intensity in an 8-bit image.

ccclst.gif

Pixel Bus In when Input Valid is TRUE, contains one of the following: valid pixel data, an end of line signal, or an end of image signal.

cu16.gif

Pixel Data is the value of the pixel.

cbool.gif

DV Data valid. Determines whether the Pixel Data element should be use (TRUE) or ignored (FALSE).

cbool.gif

EOL End of line. When TRUE, indicates that the end of the line has been reached.

cbool.gif

EOI End of image. When TRUE, indicates that the end of the image has been reached.

cenum.gif

Data Type is used in the block diagram for determining the type of the Pixel Bus. Unused during processing and gets optimized out of the compiled bit stream.

ccclst.gif

Mask Pixel Bus In is an image that specifies the region of the image that will be copied. Only pixels in Pixel Bus In that correspond to a non-zero pixel in the mask image are copied. All other pixels are set to 0.

cbool.gif

Pixel Data is the value of the pixel.

cbool.gif

DV Data valid. Determines whether the Pixel Data element should be use (TRUE) or ignored (FALSE).

cbool.gif

EOL End of line. When TRUE, indicates that the end of the line has been reached.

cbool.gif

EOI End of image. When TRUE, indicates that the end of the image has been reached.

cenum.gif

Data Type is used in the block diagram for determining the type of the Pixel Bus. Unused during processing and gets optimized out of the compiled bit stream.

cnclst.gif

Interval Range is a cluster specifying the minimum and maximum boundaries for the histogram calculation. Only those pixels having a value that falls in this range are taken into account by the histogram calculation. This cluster is composed of the following elements:

cu16.gif

Minimum is the minimum interval value. The default value of 0 ensures that the real minimum value is determined by the source image.

cu16.gif

Maximum is the maximum interval value. The default value of 0 ensures that the real maximum value is determined by the source image.

cbool.gif

Input Valid specifies whether the next data point has arrived for processing. Wire the Output Valid output of an upstream node to this input to transfer data from the upstream node to this node.

cbool.gif

Ready For Output specifies whether downstream nodes are ready for this node to return a new value. The default is TRUE. Use a Feedback Node to wire the Ready for Input output of a downstream node to this input of the current node.

Note  If this terminal is FALSE during a given cycle, the output valid terminal returns FALSE during that cycle.
ifxp.gif

Histogram returns the histogram value of the pixel.

ibool.gif

Output Valid returns TRUE if this node has computed a result that downstream nodes can use. Wire this output to the Input Valid input of a downstream node to transfer data from the node to the downstream node.

ibool.gif

Ready for Input returns TRUE if this node is ready to accept new input data. Use a Feedback Node to wire this output to the Ready for Output input of an upstream node.

Note  If this terminal returns FALSE during a given cycle, LabVIEW discards any data that other nodes send to this node during the following cycle. LabVIEW discards this data even if the Input Valid terminal is TRUE during the following cycle.

IMAQ FPGA Histogram with Range U16x8 Details

Note  Resource estimates are based on a 40 MHz clock.

Kintex-7

Estimated Device Utilization

  • Slice Registers: 3364
  • Slice LUTs: 5143
  • DSP48s: 16
  • Block RAMs: 16

Estimated Performance

  • Minimum Latency: 24
  • Initiation Interval: 1