1. Select Tools»Create LabVIEW FPGA Code.
Note If Create LabVIEW FPGA Code is disabled in the Tools menu, select File»Preferences, select the General tab, and select the target device from Target for Generated Code. You can also select a LabVIEW FPGA target from the startup screen the next time you launch Vision Assistant.
  1. Browse to the location to which you want to save the FPGA code.
  2. Select all options that apply:
    • Create LabVIEW Project creates the FPGA code under a new LabVIEW project. Specify the project name in the text box.
    • Create Host VI creates a VI on the host machine. This VI shows how images are transferred to and from the FPGA. Specify the host VI name in the text box.
    • Create FPGA Main VI creates a VI on the FPGA target. This VI shows how the pixels are retrieved from the host, processed on the FPGA, and transferred back to the host. Specify the FPGA main VI name in the text box.
      • Transfer Image Back to Host transfers images from the FPGA target to the host machine.
    • Bayer Decoding specifies how to decode Bayer pixel formats in a color image.
      • Disable does not perform Bayer decoding.
      • Bilinear selects the Bilinear Bayer decoding algorithm, which provides fast, basic Bayer decoding.
      • VNG selects the VNG Bayer decoding algorithm, which is recommended if the image contains many edges, or if the quality of the edges is important. VNG Bayer decoding takes longer than Bilinear.
  3. Enter a VI name in the FPGA Implementation VI Name text box.
  4. Click Next.
  5. Use the Controls tree to select which controls appear on the front panel of the FPGA implementation VI. Selected controls also appear on connector pane of the FPGA implementation VI. These controls can be modified while the VI is running if you create the corresponding controls on the FPGA main VI.

    Controls that are not selected become constants on the block diagram with values from the Vision Assistant step.

  6. Use the Indicators tree to select which indicators appear on the front panel of the FPGA implementation VI. Selected indicators also appear on the connector pane of the FPGA image processing VI. You can then create the corresponding indicators on the FPGA main VI. To access these indicators from the host VI, connect a property node to the FPGA VI reference.
  7. Click Finish.