Reset Synchronization Clock PXI_Trig Line
- Updated2024-03-29
- 1 minute(s) read
Reset Synchronization Clock PXI_Trig Line
Data Type |
Access | Applies to | Coercion | High-Level VIs |
---|---|---|---|---|
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R/W | N/A | None | None |
Description
Specifies or returns which PXI_Trig terminal contains the update pulse used to reset the synchronization clock dividers. The default is none. You must set this value before you can reset synchronization clock dividers using an update pulse on a PXI_Trig line.
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Note This property is supported only on signal-based devices. |
Property Node Path
niSync»Synchronization Clock Properties»Reset Synchronization Clock PXI_Trig Line