Configure Clock
- Updated2023-02-17
- 4 minute(s) read
Configure Clock
Configures the properties for synchronizing the digitizer to an external clock or sending the digitizer's clock output to be used as a synchronizing clock for other devices.
Inputs/Outputs
session in
Handle that identifies the NI-SCOPE instrument session as previously allocated by Initialize With Options .
error in
Error conditions that occur before this node runs.
The node responds to this input according to standard error behavior.
Default value: No error
clock sync pulse source
The line on which either the sample clock or the one-time sync pulse is sent or received.
| RTSI 0 | 0 | Uses the RTSI 0 bus to send or receive the sample clock or the one-time sync pulse. |
| RTSI 1 | 1 | Uses the RTSI 1 bus to send or receive the sample clock or the one-time sync pulse. |
| RTSI 2 | 2 | Uses the RTSI 2 bus to send or receive the sample clock or the one-time sync pulse. |
| RTSI 3 | 3 | Uses the RTSI 3 bus to send or receive the sample clock or the one-time sync pulse. |
| RTSI 4 | 4 | Uses the RTSI 4 bus to send or receive the sample clock or the one-time sync pulse. |
| RTSI 5 | 5 | Uses the RTSI 5 bus to send or receive the sample clock or the one-time sync pulse. |
| RTSI 6 | 6 | Uses the RTSI 6 bus to send or receive the sample clock or the one-time sync pulse. |
| PFI 1 | 7 | Uses the PFI 1 terminal to send or receive the sample clock or the one-time sync pulse. |
| PFI 2 | 8 | Uses the PFI 2 terminal to send or receive the sample clock or the one-time sync pulse. |
| Internal | 9 | Uses an internal line to send or receive the sample clock or the one-time sync pulse. |
Default value: Internal
master enabled
A Boolean value that specifies whether the device is a master or a slave.
The master device is typically the originator of the trigger signal and the clock sync pulse. For a standalone device, set this parameter to False.
| True | Sets the specified device as a master. |
| False | Sets the specified device as a slave. |
input clock source
The input source for the PLL reference clock to which the digitizer is phase-locked.
| None | 0 | No input source for the PLL reference clock. |
| RTSI Clock | 1 | Uses the RTSI clock as the input source for the PLL reference clock. |
| PFI 0 | 6 | Uses the PFI 0 input as the input source for the PLL reference clock. |
| PFI 1 | 2 | Uses the PFI 1 input as the input source for the PLL reference clock. |
| PFI 2 | 3 | Uses the PFI 2 input as the input source for the PLL reference clock. |
| PXI Clock | 4 | Uses the clock of a PXI chassis as the input source for the PLL reference clock. |
| External | 5 | Uses an external clock as the input source for the PLL reference clock. |
| Clock In | 7 | Uses the ClkIn connector as the input source for the PLL reference clock. |
Default value: None
output clock source
The output source for the PLL reference clock to which another digitizer's sample clock can be phase-locked.
session out
Reference to the NI-SCOPE instrument session to pass to the next node in the program.
error out
Error information.
The node produces this output according to standard error behavior.