Digital Signal Processing (DSP) Overview

Use this instrument design library to digitally process I/Q data. This instrument design library contains LabVIEW FPGA VIs. These VIs contain functionality that is typically found in digital downconverters (DDCs) and digital upconverters (DUCs). These VIs also perform DSP for the digital correction of analog imperfections in the system. For modules that support two samples per cycle, you can configure this instrument design library to process two I/Q data samples per cycle. You can use this instrument design library to perform the following functions:

DDC and DUC Functionality

  • Fractional Decimation- Decimates the I/Q data rate with a high frequency and phase resolution, using an FIR filter.
  • Fractional Interpolation- Interpolates the I/Q data with a high frequency and phase resolution, using an FIR filter.
  • Frequency Shift- Applies a digital frequency shift to the I/Q data.

Digital Correction Functionality

  • Digital Gain - Digitally controls the I and Q signal amplitudes.
  • Digital Offset - Digitally controls the I and Q signal offsets.
  • Equalization - Filters the I/Q data to equalize the analog response of a module.
  • I/Q Impairments - Modifies the I/Q data to correct or apply I/Q impairments, such as gain imbalance, quadrature skew, or DC offset.

This instrument design library also includes the Power Level Trigger VI and several data type conversion VIs. Data type conversion VIs simplify the interfacing between instrument design VIs and FPGA I/O nodes. Refer to the LabVIEW context help of the DSP VIs for more detailed information about the library interface.