A pattern-match trigger behaves like a combination lock. When the correct combination is read, the lock opens. Likewise, in the case of triggers, when the desired acquisition pattern is read, the pattern-match trigger is asserted.

The level state of a digital signal can be represented by a binary pattern, where a 1 corresponds to the high level (H) and a 0 corresponds to a low level (L).

For example, consider the logic levels on channels 0 through 3: H, L, L, H. This pattern can be represented in binary by replacing each H with 1 and each L with 0. The resulting binary representation is: 1001.

A pattern-match trigger enables the device to monitor input terminals for a specific bit pattern. For example, the pattern could be 10101110. When the device detects this pattern, it asserts the pattern-match trigger.

You can also specify when you want rising (R or r) and falling edges (F or f) on any edge (E or e) to occur in the pattern to be matched.
Note Pattern-match triggers are valid only for acquisition sessions.