You can configure acquisition and generation sessions to control when the first data sample is acquired or generated.

The sample can occur on:

  • The rising edge of the sample clock
  • The falling edge of the sample clock
  • A delayed version of the rising edge, when the data rate multiplier is set for DDR (Double Data Rate) operation

The second sample is acquired or generated on each subsequent sample clock edge. Notice that the delay is still a fraction of the entire sample clock period. These data positions are shown in the following figure: