NIHSDIO_ATTR_EVENT_POSITION_DELAY

Specific Attribute

Description

Specifies the delay after the Sample clock rising edge when the device initiates an event. Event delay is expressed as a fraction of the clock period (for example, a fraction of 1/Sample clock rate).

Note  This attribute is supported only on PFI 1 and PFI 2 on NI 6555/6556 devices.

Valid values range from –1 to 2 clock cycles in increments of 0.001 cycles.

The default value is 0.

Related topics:

• Multibank Data Delay
• Data Delay
• Eliminating Round Trip Delay