Complete the following steps to use the LabVIEW Interface page of the sbRIO CLIP Generator to create the LabVIEW FPGA I/O Node interface for the NI sbRIO target.
Note Click the Import from CSV or Export to CSV buttons on the bottom left of this page to import or export LabVIEW I/O node data in a CSV file.
  1. From the Available Pins control, select one or more pins.
  2. From the I/O Direction control, select one of the following options:
  3. Read-only—Creates one read-only I/O item in the LabVIEW project.
  4. Read/Write—Creates one read-only I/O item and two writable I/O items in the LabVIEW project. The first of these writable I/O items enables the output on the individual pins associated with the I/O item, and the second determines the value being output on the pins. You can read external data on the pins if the output is not enabled.
  5. From the LabVIEW Data Type control, select the LabVIEW data type to use for the FPGA I/O Node.
    Note   If you select fewer pins than the width of the data type (for example, you select 7 pins but specify a U8 data type), the created I/O item uses only the least significant bits. If you select more pins than the width of the data type, the sbRIO CLIP Generator creates multiple I/O items of the same data type.
  6. Click Add. The LabVIEW I/O Nodes table lists the created I/O node.
  7. (Optional) Use the LabVIEW Name column in the LabVIEW I/O Nodes table to rename the I/O item.
    This name appears in the LabVIEW project and on FPGA I/O Nodes on the LabVIEW block diagram. The name must meet the following requirements:
    • The I/O item name is unique. The name can not be a duplicate of another I/O item name.
    • The I/O item name starts with a letter.
    • The I/O item name contains only letters, numbers, and underscores.
  8. (Optional) Expand the information in the Pin Details column to review the details for a created FPGA I/O Node.
    FPGA I/O Node details appear in the node's <clipname>.vhd file.
  9. Repeat the steps 1 to 6 steps to create additional FPGA I/O Nodes for the CLIP.
    You can drag and drop created FPGA I/O Nodes in the LabVIEW I/O Nodes table.
  10. Click Next to continue to the Clock Settings page.
    Use the Clock Settings page to configure clock resources for the CLIP.