RIO Device Setup
- Updated2023-02-21
- 3 minute(s) read
Use the RIO Device Setup dialog box to download a bitfile to the flash memory on an FPGA device. LabVIEW creates a bitfile when you compile an FPGA VI. You also can use this dialog box to configure when the bitfile loads from flash memory, which analog input mode the device uses for measurements, and whether the device clock is synchronized to the clock of the PXI chassis. You can use one of the following methods to launch the RIO Device Setup dialog box:
- Right-click the FPGA target to which you want to download a bitfile in the Project Explorer window in LabVIEW and select RIO Device Setup from the shortcut menu to display the RIO Device Setup dialog box.
- Select Start»All Programs»National Instruments»NI-RIO»RIO Device Setup to display the RIO Device Setup dialog box. When you display the dialog box in this manner, you must select the FPGA target to which you want to download a bitfile from the Device pull-down menu.
The RIO Device Setup dialog box includes the following components:
- Resource—Select the FPGA device to which you want to download the bitfile.
- Download Bitfile to Flash—Includes the following components:
- Bitfile to Download—Determines the bitfile to download to flash memory on the FPGA device. The VI must be compiled for the device.
- Download Bitfile—Downloads the bitfile to flash memory of the device.
- Erase Bitfile on Flash—Deletes the existing bitfile on the flash memory of the device. Downloading a new bitfile also deletes any existing bitfile.
- Device Settings—Includes the following components:
- Load VI from Flash Memory—Determines when the bitfile loads to the FPGA from flash memory.
- Do not autoload VI—Does not load the bitfile from flash memory at startup.
- Autoload VI on device powerup—Loads the bitfile that is stored in flash memory to the FPGA when the system powers up.
- Autoload VI on device reboot—Loads the bitfile that is stored in flash memory to the FPGA when you reboot the system either with or without cycling power.
- Analog Input Mode—Determines which measurement system the device uses. This option is available only for analog input devices.
- Differential—Uses a measurement system in which you do not need to connect either input to a fixed reference, such as earth or building ground.
- Referenced single-ended—Uses a measurement system in which all measurements are made with respect to a common reference or a ground.
- Nonreferenced single-ended—Uses a measurement system in which all measurements are made with respect to a common reference, but the voltage at this reference can vary with respect to the measurement system ground.
- Synchronize FPGA clock to PXI/PXI_Clk10—Phase locks the NI 78xxR clock to the 10 MHz clock of the PXI chassis. This option is available only for NI PXI-78xxR devices. NI FlexRIO PXI-795xR devices automatically synchronize to the PXI_Clk10 of the PXI chassis. This setting does not take effect until you reset the device.
Note NI FlexRIO PXIe-796xR devices automatically synchronize to the PXIe/PXIe_Clk100 of the PXIe chassis. The Synchronize FPGA clock to PXI/PXI_Clk10 option is not available on these devices. - Apply Settings—Downloads the settings you configured.
- Load VI from Flash Memory—Determines when the bitfile loads to the FPGA from flash memory.