Using PXI Triggers with the LabVIEW FPGA Module

You can use the FPGA I/O Node to access the trigger lines on PXI R Series devices. When developing an FPGA VI that uses triggers, be sure to reserve the trigger lines you are using and, to ensure compatibility with other R Series devices, configure trigger pulses on PXI R Series devices to last for at least two clock cycles of the clock on the receiving device. Refer to the PXI Specification for more information about trigger bus requirements.