Xilinx Signal Generation Nodes

Implement IP related to signal generation.

Xilinx CORE Generator IP Nodes
Implement various Xilinx IP functions.
Binary Counter
Creates up counters, down counters, and up/down counters with output widths ranging up to 256 bits.
DDS Compiler
Provides Direct Digital Synthesizers (DDS) and optionally either Phase Generator or Sine/Cosine Lookup Table constituent parts as independent cores.