Xilinx Communication and Networking Nodes

Implement IP related to telecommunication and wireless applications.

Xilinx CORE Generator IP Nodes
Implement various Xilinx IP functions.
Convolution Encoder
Implements a high-speed, compact convolutional encoder with a puncturing option.
Interleaver/De-interleaver
Implements either the Forney Convolutional or Rectangular Block type architecture.
Peak Cancellation Crest Factor Reduction
Provides a flexible and highly efficient solution to reduce the peak to average power ratio (PAR) of complex multi-carrier waveforms.
Reed-Solomon Decoder
Implements many different Reed-Solomon coding standards.
Reed-Solomon Encoder
Implements many different Reed-Solomon coding standards.
Viterbi Decoder
Implements a fully synchronous Viterbi decoder, using a single clock.
Xilinx 3GPP Nodes
Implement IP related to 3GPP standards.
Xilinx LTE Nodes
Implement IP related to LTE standards.