Flush FIFO

Empties data from the FIFO and sends the data to the recipient.

For DMA target-to-host FIFOs, the recipient is the host. For peer-to-peer writer FIFOs, the recipient is the peer-to-peer reader FIFO. You must enable the peer-to-peer stream when flushing a peer-to-peer writer FIFO. Otherwise, this node executes but does not flush the FIFO.

Note Flush FIFO must be in the same clock domain as the Write FIFO node. Otherwise, the program returns a code generation error when you try to compile the FPGA VI.
1378

Inputs/Outputs

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reference in

Reference to the FIFO.

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error in

Error conditions that occur before this node runs.

The node responds to this input according to standard error behavior.

Standard Error Behavior

Default value: No error

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reference out

Reference to the FIFO.

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error out

Error information.

The node produces this output according to standard error behavior.

Standard Error Behavior

When to Use the Flush FIFO Node

  • Use the Flush FIFO node when the need for lower latency outweighs the need for higher data transfer rates. If you overuse the Flush FIFO node, you may reduce data transfer rates.
  • You can use the Flush FIFO node to flush FIFOs regardless of whether the Write FIFO node uses a handshaking interface or a timeout interface. For example, the flush still works in the following situations:
    • The Timed Out? output of the Write FIFO node returns True when you use the Flush FIFO node.
    • The Ready for Input output of the Write FIFO node returns False when you use the Flush FIFO node.

Simultaneous Flushes

If you use the Flush FIFO node when another FIFO flush is in progress, the two flushes merge.