3GPP LTE MIMO Decoder

Performs MIMO decoding using the MMSE algorithm. The 3GPP LTE MIMO Decoder LogiCORE is a drop-in module for Virtex-5(TM), Virtex-6(TM), Virtex-6L(TM), Virtex-7(TM) and Kintex-7(TM) families of FPGA. The core is fully synchronous, using a single clock, and integrates seamlessly with the Xilinx design flow.

On the Item tab, click Configure Xilinx IP to configure inputs and outputs for this node.

Need License: Yes