Clock Recovery by 2nd Order PLL VI
- Updated2023-02-21
- 6 minute(s) read
Clock Recovery by 2nd Order PLL VI
Owning Palette: Clock Recovery VIs
Requires: Jitter Analysis Toolkit
Constructs a reference clock that is synchronous with the data in a signal by using a second-order phase-locked loop (PLL) to lock the phase of an oscillator to the phase of the data edges. Wire data to the waveform input to determine the polymorphic instance to use or manually select the instance.
Clock Recovery by 2nd Order PLL (DBL)
This instance operates on the waveform data type when the Y data values are double-precision, floating-point numeric values. Use the I8 instance of this VI with integer data to reduce the size of the data and the memory usage.

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reset? specifies whether to clear the internal state of the PLL prior to starting operation. When reset? is TRUE, LabVIEW clears all state information and initializes the PLL with an initial phase of 0. When reset? is FALSE, as in a continuous operation, this VI uses the state information at the end of the previous iteration to initialize the PLL at the beginning of the current iteration. | ||||||||||||||
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waveform is the waveform to measure.
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gain specifies the loop gain. The default is 1. | ||||||||||||||
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damping specifies the damping factor. The default is 0.707. | ||||||||||||||
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error in describes error conditions that occur before this node runs. This input provides standard error in functionality. | ||||||||||||||
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VCO carrier freq (Hz) specifies the reference carrier frequency used by the voltage-controlled oscillator (VCO) to track the carrier phase of the input signal. The default is 0 Hz. | ||||||||||||||
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PLL waveform returns the waveform representation of the clock signal.
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ref level crossings returns information about the locations of level crossings in the reference clock waveform.
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error out contains error information. This output provides standard error out functionality. |
Clock Recovery by 2nd Order PLL (I8)
This instance operates on the waveform data type when the Y data values are 8-bit signed integers.

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reset? specifies whether to clear the internal state of the PLL prior to starting operation. When reset? is TRUE, LabVIEW clears all state information and initializes the PLL with an initial phase of 0. When reset? is FALSE, as in a continuous operation, this VI uses the state information at the end of the previous iteration to initialize the PLL at the beginning of the current iteration. | ||||||||||||||
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waveform is the waveform to measure.
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gain specifies the loop gain. The default is 1. | ||||||||||||||
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damping specifies the damping factor. The default is 0.707. | ||||||||||||||
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error in describes error conditions that occur before this node runs. This input provides standard error in functionality. | ||||||||||||||
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VCO carrier freq (Hz) specifies the reference carrier frequency used by the voltage-controlled oscillator (VCO) to track the carrier phase of the input signal. The default is 0 Hz. | ||||||||||||||
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PLL waveform returns the waveform representation of the clock signal.
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ref level crossings returns information about the locations of level crossings in the reference clock waveform.
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error out contains error information. This output provides standard error out functionality. |














