LabVIEW Control Design and Simulation Module

CD Convert Delay to Poles at Origin VI

  • Updated2023-03-14
  • 3 minute(s) read

CD Convert Delay to Poles at Origin VI

Owning Palette: Model Conversion VIs

Requires: Control Design and Simulation Module

Incorporates delays into discrete system models by adding poles at the origin to account for the specified delay. Wire data to the State-Space Model input to determine the polymorphic instance to use or manually select the instance.

Details  

CD Convert Delay to Poles at Origin (State-Space)

State-Space Model contains a mathematical representation of and information about the discrete-time system for which this VI converts time delays to poles at the origin.
error in describes error conditions that occur before this node runs. This input provides standard error in functionality.
State-Space Converted Model returns the discrete-time system for which this VI incorporates the total time delay between each input-output pair into the model by adding poles at the origin. To access and modify the data in the model, use the Model Information VIs.
error out contains error information. This output provides standard error out functionality.

CD Convert Delay to Poles at Origin (Transfer Function)

Transfer Function Model contains a mathematical representation of and information about the discrete-time system for which this VI converts time delays to poles at the origin.
error in describes error conditions that occur before this node runs. This input provides standard error in functionality.
Transfer Function Converted Model is the discrete-time system for which this VI incorporates the total time delay between each input-output pair into the model by adding poles at the origin. To access and modify the data in the model, use the Model Information VIs.
error out contains error information. This output provides standard error out functionality.

CD Convert Delay to Poles at Origin (Zero-Pole-Gain)

Zero-Pole-Gain Model contains a mathematical representation of and information about the discrete-time system for which this VI converts time delays to poles at the origin.
error in describes error conditions that occur before this node runs. This input provides standard error in functionality.
Zero-Pole-Gain Converted Model is the discrete-time system for which this VI incorporates the total time delay between each input-output pair into the model by adding poles at the origin. To access and modify the data in the model, use the Model Information VIs.
error out contains error information. This output provides standard error out functionality.

CD Convert Delay to Poles at Origin Details

Refer to the LabVIEW Control Design User Manual for more information about delays.

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