Implements a PID controller using a PID algorithm for simple PID applications or high speed control applications that require an efficient algorithm. The PID algorithm features control output range limiting with integrator anti-windup and bumpless controller output for PID gain changes. Use the DBL instance of this VI to implement a single control loop. Use the DBL Array instance to implement parallel multi-loop control.


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Inputs/Outputs

  • cdbl.png setpoint —

    setpoint specifies the setpoint value, or desired value, of the process variable being controlled.

  • cdbl.png process variable —

    process variable specifies the measured value of the process variable being controlled. This value is equal to the feedback value of the feedback control loop.

  • cnclst.png PID parameters —

    PID parameters is a cluster containing the updated PID gains parameters for each controller. You can use the updated values with other PID VIs.

  • cdbl.png Kp —

    In the equation that defines the PID controller, KC represents the proportional gain.

  • cdbl.png Ti —

    integral time (Ti, min) specifies the integral time in minutes. The default is 0.01.

  • cdbl.png Td —

  • cdbl.png manual control —

    manual control specifies the value of the control output when auto? is FALSE.

  • ccclst.png options —

    options specifies the settings for the PID control.

  • cdbl.png sp low —

    sp low specifies the lower bound of the setpoint range in terms of percentage points or engineering units.

  • cdbl.png sp high —

    sp high specifies the upper bound of the setpoint range in terms of percentage points or engineering units.

  • cdbl.png out low —

    out low specifies the lower bound of the output range in terms of percentage points or engineering units.

  • cdbl.png out high —

    out high specifies the upper bound of the output range in terms of percentage points or engineering units.

  • cbool.png hold (F) —

    hold specifies whether the controller ignores changes in the process variable and suspends any integral action. If you set hold as TRUE, output will retain its previous value. The default is FALSE.

  • cbool.png auto (T) —

    TRUE selects automatic control, FALSE puts controller in manual. Bumpless transfer is used from automatic to manual.

  • cbool.png pro. band (F) —

    pro. band indicates whether the proportional value of PID parameters input is proportional gain (Kc) or proportional band (PB). The default is FALSE, which means the proportional value is proportional gain. The conversion rate is Kc = 100/PB.

  • cbool.png reverse acting (T) —

    reverse acting specifies whether the control is reverse- or forward-acting. The default is TRUE, which means output decreases if the input is greater than the setpoint.

  • cdbl.png beta —

    beta specifies the relative emphasis of setpoint tracking to disturbance rejection. The default value of 1 is appropriate for most applications. You can use a smaller value between 0 and 1 to specify emphasis on disturbance rejection, such as process load changes.

    The VI uses this value in the two degree-of-freedom algorithm.

  • cdbl.png linearity —

    linearity specifies the linearity of the error response. The valid range for linearity is 0 to 1. A value of 1 provides a normal linear response, while a value of 0.1 provides an approximately parabolic response.

    The VI uses this value in the nonlinear error calculation and the nonlinear gain factor calculation.

  • cdbl.png dt (s) —

    dt (s) specifies the loop-cycle time, or interval in seconds, at which this VI is called. If dt (s) is less than or equal to zero, this VI calculates the time since it was last called using an internal timer with 1 ms resolution. If dt (s) must be less than 1 ms, specify the value explicitly. The default is -1.

  • ci32.png iteration —

    iteration is the current iteration of the loop.

    Wire this parameter to the iteration terminal of the While Loop.

  • idbl.png output —

    output returns the control output of the PID algorithm that is applied to the controlled process. If this VI receives an invalid input, output returns NaN.

    • You can use the DBL Array instance of this polymorphic VI in multi-loop PID control applications. In this case, the length of the process variable input determines the length of the output array. Other input arrays do not necessarily need to be the same length as the process variable input. This VI resizes other input arrays to the same length as the process variable input as follows:

    • If the input array is longer than the process variable input, the input array is truncated to the length of the process variable input. Additional values in the array are not used.
    • If the input array is shorter than the process variable input, the last value of the input array is repeated until the size matches that of the process variable input.

    In this manner, an input value that must be used for each output calculation does not need to be specified repeatedly in the array passed into this VI. Instead, the array can consist of a single value that is used for each output calculation.

    Examples

    Refer to the following example files included with LabVIEW.

    • labview\examples\control\PID\General PID Simulator.vi