Rotates x the number of bits specified by y.

The connector pane displays the default data types for this polymorphic function.


icon

Inputs/Outputs

  • ci16.png y —

    y specifies the number of bits in x that the function rotates.

    If y is greater than 0, the function shifts the first y bits at the left end of x to the right end. If y is less than 0, the function shifts the first y bits at the right end of x to the left end.
  • cu32.png x —

    If x is an 8-, 16-, 32-, or 64-bit integer, then for any value of y, y ± 8, y ± 16, y ± 32, or y ± 64 yields the same output value, respectively, as y.

    For example, if x is an 8-bit integer, y = 1 and y = 9 yield the same result.
  • iu32.png x rotated left by y —

    x rotated left by y is the result of the rotation.

    The data type of x rotated left by y is determined by the data type of the x input.

    • The following table illustrates how x and y affect x rotated left by y:

    yxx rotated left by yComments
    13 (00000011)6 (00000110)This function shifts the first one bit on the left, 0, to the right end.
    23 (00000011)12 (00001100)This function shifts the first two bits on the left, 00, to the right end.
    –33 (00000011)96 (01100000)This function shifts the first three bits on the right, 011, to the left end.

    FPGA Module Details

    The following details apply when you use this object in an FPGA VI.

    Note The following details are subject to change with each version of the LabVIEW FPGA Module.
    Single-Cycle Timed Loop Supported.
    Usage N/A
    Timing

    Inside single-cycle Timed Loop--When you use this function inside a single-cycle Timed Loop, the combinatorial logic delay is proportional to the number of bits in x.

    Outside single-cycle Timed Loop--When you use this function outside a single-cycle Timed Loop, it takes one clock cycle and uses one register.
    Resources This function requires FPGA resources proportional to the number of bits in x.