Represents the round-off error for a floating-point number with a given precision. Use the machine epsilon constant to compare whether two floating-point numbers are equivalent.


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FPGA Module Details

The following details apply when you use this object in an FPGA VI.

Note The following details are subject to change with each version of the LabVIEW FPGA Module.
Single-Cycle Timed Loop Supported.
Usage The default data type for these constants is single-precision floating-point (SGL).
Timing These constants require no clock cycles to execute because they do not include internal registers.
Resources These constants alone consume no FPGA resources. However, if you wire one of these constants to a logical operation, FPGA lookup table resources store the constant value.