When you use the IF transceiver with LabVIEW FPGA there are several types of clocks you can use.

A base clock is a digital signal existing in hardware that you can use as a clock for an FPGA Module application. A derived clock is a clock you create from a base clock that you can use as a clock for an FPGA Module application. The top-level clock is the global clock that the FPGA VI uses outside a single-cycle timed loop.

A pulse generator-created clock is created by using the Clock node that is included as part of the NI-5640R asynchronous programming palette.