Digital Signal Transceiver Driver Host API

The DST instrument is a high-speed serial instrument configured to behave like a digital vector signal transceiver though a custom FPGA firmware. The FPGA firmware allows you to:

  • Receive data from the serial interface, buffer to the onboard memory, and then transfer the I/Q data to host
  • Transfer I/Q data from the host to the onboard memory and transmit to the serial interface using scripts to repeat or start and/or stop at specific events
  • Easily convert serial data stream into I/Q data with the option to apply digital signal processing (DSP) functions for improved performance and better control of the data stream for generation of test vectors and correction of measurement signals
Figure 3. DST Host API


The API has four main sections that helps you control different parts of the FPGA code:

  • Digital Signal Transceiver (DST)—These functions configure, control, generate, and acquire I/Q data by communicating with the DUT through a high-speed serial interface.
  • Generation (DSTG)—These functions configure the firmware to generate data to the high-speed serial interface in many different forms. In general, you can download I/Q waveforms to the DRAM of the device and then repeat according to a script, with a similar functionality to NI-RFSG. Refer to Generating an I/Q Waveform for more information.
  • Acquisition (DSTA)—These functions configure the firmware to receive the stream of data from the high-speed serial interface and process that stream to transfer the I/Q data to the host. This process also allows you to change some features in the firmware, allowing you to get the specific data you are looking for. Refer to Acquiring an I/Q Waveform for more information.
  • Serial Interface—These functions call into a plug-in interface where you can control or change the configuration to the serial interface hardware, allowing you to change the protocol or customize your own serial interface. Refer to High-Speed Serial Communication and Interface for more information.
    • Figure 4. High-Speed Serial Interface