Level Configuration
- Updated2026-01-12
- 1 minute(s) read
Groups
None
Group members
| Name | Description |
|---|---|
| NIDIGITAL_ATTR_ACTIVE_LOAD_IOH | Specifies the current that the DUT sources to the active load while outputting a voltage above VCOM. |
| NIDIGITAL_ATTR_ACTIVE_LOAD_IOL | Specifies the current that the DUT sinks from the active load while outputting a voltage below VCOM. |
| NIDIGITAL_ATTR_ACTIVE_LOAD_VCOM | Specifies the voltage level at which the active load circuit switches between sourcing current and sinking current. |
| NIDIGITAL_ATTR_TERMINATION_MODE | Specifies the behavior of the pin during non-drive cycles. |
| NIDIGITAL_ATTR_VIH | Specifies the voltage that the digital pattern instrument will apply to the input of the DUT when the test instrument drives a logic high (1). |
| NIDIGITAL_ATTR_VIL | Specifies the voltage that the digital pattern instrument will apply to the input of the DUT when the test instrument drives a logic low (0). |
| NIDIGITAL_ATTR_VOH | Specifies the output voltage from the DUT above which the comparator on the digital pattern test instrument interprets a logic high (H). |
| NIDIGITAL_ATTR_VOL | Specifies the output voltage from the DUT below which the comparator on the digital pattern test instrument interprets a logic low (L). |
| NIDIGITAL_ATTR_VTERM | Specifies the termination voltage the digital pattern instrument applies during non-drive cycles when the termination mode is set to Vterm. The instrument applies the termination voltage through a 50 Ω parallel termination resistance. |
Attachments
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