Figure 1. The USRP 2945
1. Features At-a-Glance
- High-performance two-stage superheterodyne RF front end
- LO sharing for phase-aligned/coherent operation
- Four independently tunable RX channels
- 80 MHz instantaneous bandwidth per channel
- 10 MHz to 6 GHz RF center frequency
- Xilinx Kintex-7 410T FPGA for custom logic and digital signal processing (DSP), programmable with the LabVIEW FPGA Module
- High-speed, low-latency PCI Express x4, 800 MB/s connection to the host
Engineers and researchers in the aerospace, defense, and commercial fields can use the powerful and flexible USRP-2945 and USRP-2955 devices to collect and analyze RF signals. Example applications include:
- Spectrum Monitoring
- Signals Intelligence (SIGINT)
- Communications Intelligence (COMINT)
- Direction Finding
- Wideband Recording
For instance, you can pair the USRP-2945 with an HDD-8265 RAID array to stream recorded RF data directly to disk—all using LabVIEW software.
Figure 2. The USRP-2945 and a PXI Based RAID Hard Drive Array
The online NI community also has several examples to use as starting points, including a direction finding example designed for the USRP-2945 and USRP-2955 using the MUSIC algorithm.
3. Sophisticated RF Front End
The USRP-2945 and USRP-2955 feature a brand-new two-stage superheterodyne receiver architecture that achieves the superior selectivity and sensitivity required for applications such as signals intelligence, spectrum analysis, and spectrum monitoring. Each device possesses four independently tunable channels, with a frequency range from 10 MHz to 6 GHz and 80 MHz of instantaneous bandwidth per channel.
Figure 3. Two-stage Superheterodyne Architecture Used in the USRP-2945 and USRP-2955
4. LO Sharing and Synchronization
The devices feature advanced synchronization as they can import LOs to each channel and export LOs from one channel. LO sharing is beneficial for several reasons. First, it allows you to create phase-coherent receive channels, which is critically important for direction finding and beamforming applications. By sharing LOs, each channel is tuned to the exact same frequency. Although each channel will still have a phase offset from each other because of differences in circuitry and cable length, the offset will be constant. LO sharing also results in higher phase stability than synthesizing LOs from a common reference clock.
Figure 4 shows several options for LO sharing. Each receiver channel has two LOs, because a two-stage architecture is used. Each RF daughterboard has two receivers, and each device has two RF daughterboards. Each receiver channel can either operate independently, share the LO of the companion channel (on the same daughterboard), or import an external LO.
Figure 4. LO Sharing Options for Single USRP Device
Connections on the rear of the device (Figure 5) allow you to conveniently import or export LOs to additional USRP-2945 or USRP-2955 devices. This is useful for creating large phase-coherent antenna arrays. In this case, the exported LO must be split, amplified, and fed to all other devices.
Figure 5. LO Connectors on Rear Panel
5. Powerful FPGA Architecture
Each USRP-2945 and USRP-2955 device includes a Kintex-7 410T FPGA for high-speed DSP and co-processing. This reconfigurable FPGA is ideal for processing the large amounts of data generated in spectral monitoring or signals intelligence applications in real time. The devices also have a MXI-Express port that allows up to 800 MB/s of streaming data transfer to your desktop, laptop, or PXI Express controller. You can then store, play back, or process that data.
Like all USRP RIO software defied radios, the USRP-2945 and USRP-2955 are programmable with both LabVIEW and LabVIEW FPGA. For applications that require only host processing, you can use LabVIEW to provide a simpler path to use the device. For more advanced prototyping, you can use the LabVIEW FPGA Module to program the on-board FPGA using the same LabVIEW data flow. This enables low-latency, clock-level control of data for maximum performance, all without needing to use traditional hardware description languages. LabVIEW FPGA also supports integration of VHDL IP, permitting you to reuse pre-existing code.
6. Optional GPSDO
The USRP-2955 uses the same hardware as the USRP-2945 but is also equipped with a GPS-disciplined 10 MHz oven-controlled crystal oscillator (OCXO) reference clock (GPSDO). The OCXO reference clock is 100 times more accurate than a standard temperature compensated crystal oscillator, and the GPS disciplining delivers improved frequency accuracy and synchronization capabilities. The GPSDO is particularly useful in synchronizing USRP (Universal Software Radio Peripheral) devices over a wide area and providing additional clock stability required for some applications, such as GNSS prototyping.
7. Next Steps
The USRP-2945 and USRP-2955 represent the cutting edge in wireless receiver research, prototyping, and deployment. Use the advanced RF architecture and integrated LabVIEW software environment to get started today.