MinKeun Chung - Yonsei University
Min Soo Sim - Yonsei University
Dong Ku Kim - Yonsei University
Chan-Byoung Chae - Yonsei University
Our research group at Yonsei University is working on the development of future wireless communications from theory to prototyping. We have collaborated with the NI advanced wireless research team through the RF/Communications Lead User Program since 2014. We demonstrated a real-time full-duplex LTE system at IEEE GLOBECOM in Austin, Texas, in December 2014. Based on this prototype, we can elaborate on how to address our key challenge and implement real-time full-duplex radios.
Mobile devices with advanced wireless network capabilities, such as smartphones and tablets, are becoming ubiquitous. Keeping pace with their growth is the ever-increasing demand for bandwidth.
Although the laws of physics prohibit the production of more spectrum, there is potential for aggressive expansion in scarce resource, that is, boosting spectral efficiency using novel technologies. Full duplex is a candidate for creating a new breakthrough to alleviate the spectrum crunch. It theoretically doubles spectral efficiency, which makes it worth billions of dollars. Full duplex thus holds the tremendous potential to solve the future evolution of wireless systems.
Since Guglielmo Marconi developed the wireless telegraph in 1895, the bane of wireless networks has been self-interference. Self-interference represents the key challenge to implementing full-duplex wireless systems. With self-interference, through the coupling of transceivers in a wireless network, a signal is transmitted from a transmitter to its own receiver while that receiver is attempting to receive a signal sent by the other device. It compels the fundamental assumption that a wireless network has to be operated in half-duplex mode on the same channel. For example, Long-Term Evolution (LTE) frequency-division duplex (FDD) today operates so that the downlink and uplink transmission take place in two different frequency bands. In other words, the existence of self-interference cuts in half the amount of resources available, such as time and frequency, for wireless communications. For this reason, we must manage self-interference to achieve the highest throughput performance with limited radio resources.
Up to this point, researchers have mostly depended on software simulations to test their theories that exploit simplified channel models (for example, additive white Gaussian noise, Rayleigh fading, and more). In real-world wireless systems, however, impairments occur that are often overlooked in simulations, such as amplifier nonlinearity, gain/phase offset, I/Q imbalance, quantization effects, and timing jitter. Such impairments make prototyping imperative if the feasibility and commercial viability of any new wireless standard or technology are to be validated. LabVIEW graphical design system software from NI offers many of the attributes for rapid prototyping with SDRs. The tight integration between LabVIEW and SDR platforms simplifies the low-level hardware complexities so we can focus on improving and evolving our algorithms for a full-duplex system with the flexibility of system partitioning. In addition, system design tools that deliver communications and signal processing libraries also facilitate rapid prototyping.
We based the demonstrated full-duplex prototype on the LTE downlink standard with the following system specifications: a transmission bandwidth of 20 MHz, 30.72 MHz sampling rate, 15 kHz subcarrier spacing, 2048 fast Fourier transform (FFT) size, and variable 4/16/64 quadrature amplitude modulation (QAM). We follow the frame structure of the LTE downlink with a frame duration of 10 ms for transmission. Each frame is divided into 20 slots, each 0.5 ms in duration. Each slot contains six orthogonal frequency division multiplexing symbols with 512 cyclic prefix (CP) length (extended mode). We used the NI PXIe-8133 RT controller to generate the data bit. After the modulation block, the data symbols are interleaved with reference symbols stored in a look-up table. We padded an array of interleaved symbols with zeros to form an array of 2048 samples. The 2048 samples pass through a 2048-point inverse FFT (IFFT) block transforming the frequency domain samples into the time domain. We executed the 2048 IFFT with 512 CP insertion block on the NI PXIe-7965R FPGA module. To operate the discrete Fourier transform, it uses Xilinx FFT intellectual property core.
Proposed Full Duplex System
For analog self-interference cancellation, we introduce a novel RF antenna. We based our approach on a dual-polarization antenna with a high cross-polarization discrimination (XPD) characteristic. XPD is defined as the ratio of the co-polarized average received power to the cross-polarized average received power. It represents, in other words, the ability to maintain radiated or received polarization purity between horizontally and vertically polarized signals. The proposed RF unit is a compact antenna with two poles. One pole is used as a radiated transmit (Tx) output; the other is used as a received receive (Rx) input in a full-duplex radio. XPD is an important characteristic, particularly in full-duplex systems, in which cross-talk between Tx and Rx ports can curb the system’s throughput performance. Since XPD has a relationship to interport isolation, the dual-polarization antenna with high XPD is, in full-duplex systems, an excellent solution. We find that the dual-polarization antenna achieves 42 dB of isolation. Using active analog cancellation achieves an additional gain of up to 60 dB by tuning the attenuation, phase shift, and delay parameters.
The goal of digital self-interference cancellation is to suppress, after cancelling self-interference (analog domain), any residual self-interference. Digital self-interference cancellation consists of rebuilding self-interference and subtracting it from the received signal. At the moment of decoding the desired symbol, it is critical to know which residual self-interference has an effect on the received symbol in full-duplex mode. Thus, key issues are to design synchronization and channel estimation strategies for residual self-interference as well as for a desired link. To operate a real-time digital self-interference canceller with high performance, we focus on FPGA implementation using LabVIEW system design software and the PXI Express platform. In the digital domain, we calculate error vector magnitude for self-interference to measure the average level of digital self-interference cancellation. As a result, we achieve 43 dB of self-interference cancellation in the digital domain.
Prototype Test Results
To compare the throughput improvement, we also implemented the LTE FDD prototype operated in half-duplex mode with the same system specifications and hardware architecture. Our prototype delivers high throughput performance in real-time. It delivers a throughput increase of 1.9x on the 4, 16 QAM and 1.89x on the 64 QAM compared to the conventional half-duplex mode.
Full-duplex radio technologies could be a major contributor to increasing spectrum efficiency in areas of explosive traffic demand with limited radio resources. To validate the feasibility and commercial viability of any new wireless standard or technology like full-duplex radio, SDR-based prototyping is imperative. We prototyped a design that combines dual-polarization full-duplex RF and the digital self-interference canceller that operates in real-time on the SDR platform. We focused on a more practical prototype that exhibited outstanding self-interference cancellation performance. We dedicated the main portion of this article to presenting the design, implementation, and evaluation of a real-time full-duplex LTE system, a candidate for next generation wireless communication systems. We expect our prototype design to provide worthwhile insights into developing the most viable solution for future wireless communication systems. Further, we continue to design and implement architectures for enhanced full-duplex systems through NI system design software with SDR platform.
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