1. Benchmark Setup and Measurement
NI R&D chose benchmark tests based on representativeness of common control and monitoring applications as well as major tasks found in these applications. See the table below for an overview of tests conducted in this study.
Table 1. Tests implemented on CompactRIO controllers measured application performance and throughput.
For each of these tests, the CPU usage is measured at a steady state while varying the number of I/O channels and loop rates. The average value of the CPU usage is obtained to compare the relative performance of the two CompactRIO controllers. These metrics give an idea of the required resources for additional code, higher loop rates, or more I/O channels. In the case of the dual-core ARM Cortex-A9 processor in the CompactRIO value controller, the results of each individual core are averaged.
2. Control Application Performance Benchmark
The combination of technologies in the CompactRIO value controller equates into a performance improvement for complex, real-world applications. To test a complex control scenario, the LabVIEW FPGA Control on CompactRIO Sample Project was selected implementing a cubic spline trajectory generation algorithm. The application was then expanded to algorithm calculations on eight parallel channels limited to two millisecond control loop execution.
Figure 1. The architectural diagram of the LabVIEW FPGA Control on CompactRIO Sample Project features a cubic spline trajectory generation algorithm.
This benchmark test was deployed to the NI cRIO-9074, a previous generation CompactRIO value controller, and the cRIO-9068, a variant of the new CompactRIO value controller. cRIO-9074 used 72 percent of its available processor time, while cRIO-9068 used just 11 percent.
Figure 2. Compare the processor time required to run a control application that runs a spline interpolation across eight channels with a 2 ms period.
3. Monitoring Application Throughput Benchmark
A benchmark was also created to measure the CompactRIO value controller's ability to transfer data from I/O channels to the real-time application, a task common in monitoring applications. Each I/O channel’s data stream consisted of 16-bit samples transferred at 100 kHz.
The previous generation controller, the cRIO-9074, used 46 percent of its available processor time to stream 10 channels of I/O data, while the cRIO-9068 controller required only seven percent. At most, cRIO-9074 could stream 25 I/O channels at this rate, while cRIO-9068 streamed as much as 100 channels.
Figure 3. Compare the processor time required to stream 10 channels of 16-bit samples transferred at 100 kHz per channel.
Much of the CompactRIO value controller’s impressive streaming performance stems from the advanced AXI-4 bus technology used to transfer I/O data from the FPGA to the ARM processor. This bus, when benchmarked alone, can transfer data at up to 300 MB/s, a significant improvement over the PCI bus technology, which has a theoretical maximum bandwidth of roughly 133.33 MB/s, used in previous CompactRIO controllers.
The CompactRIO value controller also gives developers the freedom to use the increased bandwidth however they see fit with up to 16 separate DMA channels, an increase of more than three times over previous CompactRIO controllers.
4. Control and Monitoring Application Performance Benchmark
Perhaps the best benchmark of the CompactRIO value controller's performance is to test it with a complex real-world application that combines all types of common monitoring and control tasks, including multiple processing loops with multirate control, data processing, streaming data from I/O channels and logging it to disk, communicating across the network to an HMI, and performing non-time-critical health and status monitoring tasks.
This complex application uses common LabVIEW architectural components like real-time FIFOs, Timed Loops, and network streams to coordinate and communicate between the various application components.
Figure 4. This architectural diagram shows a complex real-world control and monitoring application.
Using this application, cRIO-9074 achieved a maximum control loop rate of 500 Hz before it had 97 percent processor use, while the cRIO-9068 value controller used only 18 percent of available processor time with a loop rate of 500 Hz. This leaves a significant amount of processor time to add additional application tasks, or increase the loop rate to speeds well over 2 kHz for this complex control and monitoring application.
Figure 5. Compare the processor time required to run a complex application with many common control and monitoring tasks at different control loop rates.
5. Performance Conclusions
It is clear that when the CompactRIO value controller is used for real-world applications and tasks, it demonstrates significant improvements in performance when compared to the previous generation of CompactRIO value controllers across a wide range of metrics that are important for control and monitoring applications. These improvements are due to its unique hardware architecture as well as the use of the NI Linux Real-Time OS.
Because the design of the CompactRIO value controller is such a departure from the previous generation of CompactRIO value controllers, like cRIO-9074, it’s important to realize that the performance improvements will vary greatly depending on how an application is designed and what features of controllers are being used.
But through these benchmarks, the CompactRIO value controller (cRIO-906x) has proven to have roughly four times the performance of the previous generation of CompactRIO value controllers like the cRIO-9074.
6. Next Steps
Learn more about the cRIO-9068 Controller
Benchmarking Single-Point Performance on National Instruments Real-Time Hardware
LabVIEW FPGA Benchmarks for Virtex-5 R Series Targets