LabVIEW Communications System Design Suite 3.0 Bug Fixes

Publish Date: Nov 08, 2018 | 0 Ratings | 0.00 out of 5 | Print

Overview

The following items are a subset of known issues fixed between LabVIEW Communications System Design Suite 2.1 and 3.0. If you have a CAR ID, you can search this list to validate that the issue has been fixed. This is not an exhaustive list of all bugs fixed in this release and does not capture bugs that were fixed in LabVIEW NXG.

ID

Fixed Issue
707042 Any project containing a MathScript Node that had the 'Show Label' checkbox selected will fail to migrate properly.
706319 Some PXIe controllers mistakenly appear as Real-Time Compatible in SystemDesigner.
704824 The Xilinx IP Generator fails to launch after clicking the "Configure Xilinx IP" button on some builds of Windows 10 (version 1709).
703930 It is not possible to use variable sized array controls in Optimized FPGA VIs.
703080 FPGA compilations fail when dependencies in a Library are not exported.

 

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