PWM Input Examples in LabVIEW FPGA and the 7831R

[ExamplePrograms]

Pulse Width Modulation (PWM) is a common method to encode a single data value on a continuous pulse train signal. The frequency of the pulse train remains constant and the value is encoded in the duty cycle of the pulse train. Engineering values are converted to the 0-100% range of the duty cycle.

The examples show how to measure a PWM signal using the digital I/O lines of the NI PXI-7831R reconfigurable I/O device using a LabVIEW FPGA VI. The examples include two configurations of the FPGA VI. In the simpler configuration, the FPGA VI measures only the high and low phases of the signal. The host VI must then calculate the duty cycle value of the PWM signal. In the advanced configuration, the FPGA calculates the PWM value and returns an unsigned 16-bit value. 0-65536 corresponds to 0-100%.

Due to the cycle time of the loop running on the FPGA, you can measure only a certain range of PWM values with these FPGA VIs. The high and low phases of the PWM signal each need to be longer than about 5 cycles of the FGPA clock (125ns at 40 MHz) for the FPGA VI to properly measure the signal.