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PXIe-5413 Power On and Device Reset

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    Last Modified: October 18, 2018

    The PXIe-5413 has different settings when powering on and after powered on or a device reset.

    The PXIe-5413 is in the following state from the time at which the computer begins to power on until the operating system has started and NI-FGEN is loaded.

    CH <0..1> PFI <0..1> PXI_Trig <0..7>
    • Analog output is disabled.
    • 0 V amplitude
    • 50 Ω output impedance to ground
    • Tristated
    • Tristated and floating

    When the operating system has started and NI-FGEN is loaded or after performing a device reset, the PXIe-5413 is in the following state.

    CH <0..1> PFI <0..1> PXI_Trig <0..7> Clocks
    • Analog output is enabled.
    • 0 V amplitude
    • 0 dB attenuation
    • Low-gain amplifier path is enabled.
    • Tristated
    • Tristated and floating
    • Sample Clock Timebase is set to use the internal voltage-controlled crystal oscillator (VCXO).

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