Refer to the following figure and tables for information about the PXI-5422 front panel connectors and LEDs:
PXI-5422 Signal Descriptions
||Generates waveforms from an analog output terminal.
||Accepts an external PLL Reference Clock and can phase-lock the internal Sample Timebase Clock to the external Reference Clock. The signal on this connector can also be used as a Sample Clock source.
||Accepts a trigger from an external source and can start or step through waveform generation or route signals from several clock, event, and trigger sources.
|DIGITAL DATA & CONTROL (DDC)
|| Routes the 16-bit digital pattern outputs, digital pattern clock output, trigger outputs, trigger inputs, and a clock input.
The DDC connector is not available on the PXI-5422 8 MB memory option.
PXI-5422 ACCESS LED Indicators
The ACCESS LED indicates basic hardware status.
|No color (off)
||The PXI-5422 is not yet functional, or the PXI-5422 has detected a problem with a power rail.
||The PXI-5422 is being accessed.
||The PXI-5422 is ready to be programmed by NI-FGEN.
PXI-5422 ACTIVE LED Indicators
The ACTIVE LED indicates the
PXI-5422 hardware state.
|No color (off)
||The PXI-5422 is not generating.
||The PXI-5422 is armed and waiting for a trigger.
||The PXI-5422 has received a trigger and is generating a waveform.
||The PXI-5422 has detected an error. NI-FGEN must access the PXI-5422 to determine the cause of the error. The LED remains red until the error condition is removed. Example errors include the following:
Phase-locked loop (PLL) unlocked: The PXI-5422 has detected an unlocked condition on a previously locked PLL. A PLL that is unlocked while in reset does not show an error.
The PXI-5422 has powered down because the internal temperature exceeded the maximum limit. The over-temperature condition must be corrected and the hardware reset. To reset the hardware, call niFgen Reset Device or niFgen_ResetDevice, or perform a device reset in MAX.