Table Of Contents
SyncPulse.Src
Version:
Last Modified: July 19, 2019
Specifies the terminal of the signal to use as the synchronization pulse. The synchronization pulse resets the clock dividers and the ADCs/DACs on the device.
Data type: 
Long Name: Timing:More:Synchronization Pulse:Digital Edge:Source
Class: DAQmx Task
Permissions: Read/Write
Where This Property Is Available:
Desktop OS: Windows
FPGA: Not supported
Web Server: Not supported in VIs that run in a web application