Generates a ramp digital waveform that contains a binary count-up pattern that starts at zero and counts up by one until it reaches 2n-1, where n equals the number of signals you specify.
The number of samples to include in the generated digital waveform.
The number of signals to include in the generated digital waveform.
The sample rate of the generated digital waveform.
The generated ramp pattern.
Where This Node Can Run:
Desktop OS: Windows
FPGA: This product does not support FPGA devices
Web Server: Not supported in VIs that run in a web application