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Table Of Contents

Building a Bitfile

Last Modified: August 13, 2018

Convert your FPGA code into a bitfile which can then be deployed to the FPGA. The bitfile contains binary data that describes how to configure the FPGA circuit so that it performs the same function as the code in the FPGA VI.

Before you build a bitfile, ensure you have set up the FPGA compiler environment and your FPGA application and all dependencies are targeted to an FPGA device in SystemDesigner.

Complete the following steps to build a bitfile from your FPGA code:

spd-note-note
Note  

Building a bitfile can take a significant amount of time, depending on the size of the VI, the processor speed, and the amount of memory in the computer on which you are building the bitfile. NI recommends that you test and debug an FPGA VI before building it into a bitfile.

  1. In the Application document, on the Document tab, enter information about your application in the Details section. Configure the build settings in the Build section.
  2. Click File»Save all to save all files.
  3. Optional: Click FPGA compiler preferences and verify the compiler settings.
  4. Click Build Application.
  5. Click OK.
    The bitfile begins compiling immediately and the Build Queue tab shows the status of current and completed compilations.
    spd-note-note
    Note  

    Do not change any code in your FPGA application during the diagram analysis stage of compilation. Any changes you make to code during the diagram analysis stage may be reflected in the bitfile. If you want to continue working on code while you wait for the compilation to finish, do so after the diagram analysis stage.

Monitor the compilation of your bitfile to determine whether you need to make changes to your code.


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