Multirate Dataflow extends program development by enabling you to implement multirate, streaming digital signal processing (DSP) algorithms in an editor scoped for multirate development.
You can create and test algorithms on a computer or host using floating-point numeric data, easily convert those algorithms to fixed-point numeric representation, and set design constraints to use in implementation strategies on an FPGA. Multirate Dataflow enables you to quickly iterate on your algorithm design before moving your algorithm to the FPGA.
You use Multirate Dataflow by creating a Multirate diagram.
The Multirate diagram looks very similar to a VI diagram and shares many of the same features. However, the Multirate diagram behaves differently from a VI diagram. The following table describes some differences between G Dataflow and Multirate Dataflow.
|Language||Node Behavior per Execution||Node Executions per Diagram Iteration|
|G Dataflow||A node can consume and produce only a single data sample each time the node executes.||Each node executes only once per iteration of the diagram unless you place the node in a loop to process sequential sets of data.|
|Multirate Dataflow||A node can consume and produce multiple data samples each time the node executes.||Each node automatically executes as many times as needed to process all the data samples streaming through the diagram without the need for loops.|
Multirate diagram execution automatically handles sample rate changes from node to node. The following example illustrates the ability of the Multirate diagram to handle rate changes.