Table Of Contents

Write DMA FIFO (G Dataflow)

Last Modified: June 1, 2017

Writes elements to the DMA FIFO from the host VI.

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reference in

Reference to an FPGA VI.

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data

Data specifies the value(s) you would like to transfer to the FPGA target.

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timeout (ms)

Timeout (ms) specifies the minimum number of milliseconds the DMA write function waits before timing out.

Default: 5000

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error in

Error conditions that occur before this node runs. The node responds to this input according to standard error behavior.

Default: No error

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reference out

Reference to an FPGA VI.

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empty elements remaining

Empty elements remaining returns the number of empty elements available for writing in the host-side DMA channel buffer.

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error out

Error information. The node produces this output according to standard error behavior.

Where This Node Can Run:

Desktop OS: Windows

FPGA: Not supported


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