Generates a waveform that is the sum of integer cycle sine tones with evenly spaced frequencies.
Distribution of the phases of the sine tones. The phase distribution affects the Peak/RMS ratio of the overall waveform.
Each phase is chosen randomly between 0 and 360 degrees.
The phase difference between adjacent frequency tones varies linearly from 0 to 360 degrees. This gives the best Peak/RMS ratio but might cause the signal to have periodic components within the period of the overall waveform.
The phase varies linearly from 0 to 360 degrees.
Value that the sum of all the tones is scaled to and the largest absolute value that the waveform contains.
An array in which each element is a single tone amplitude.
The size of this array determines how many tones are generated.
Lowest tone frequency generated.
This value must be an integer multiple of sample rate/samples.
Magnitude of the spacing between adjacent tone frequencies.
delta frequency must be an integer multiple of sample rate/samples.
If start frequency is 100 Hz, delta frequency is 10 Hz, and the tone amplitudes array contains three elements, the tone frequencies generated are 100 Hz, 110 Hz, and 120 Hz.
Causes reseeding of the noise sample generator when the value is greater than 0.
This node ignores seed if phase relationship is Linear.
Error conditions that occur before this node runs. The node responds to this input according to standard error behavior.
Default: No error
Sampling rate in samples per second.
Number of samples in the signal.
Ratio of the Peak voltage to the RMS voltage of the output signal.
Tone frequencies generated after accounting for coercion and the Nyquist criteria.
Error information. The node produces this output according to standard error behavior.
The frequency domain representation of this waveform is a sequence of impulses at the specified tone frequencies and zero at all other frequencies. The number of tones is determined by the size of the input tone amplitudes. This node generates the sine tones according to the following steps:
Where This Node Can Run:
Desktop OS: Windows
FPGA: Not supported