Table Of Contents

Registers (Clock-Driven Logic)

Last Modified: September 10, 2016

Sets/gets the configuration values for the Synchronization nodes by connecting it to the Register Bus.



The synchronization instance. sync.resources is obtained from the Create node.


register instruction

A read or write register instruction. This parameter is usually obtained from the register instruction parameter of the Process node. The source of this parameter defines the Register Bus objects to which the Synchronization node is wired, and it is communicated from the host.


read completion

Indicates whether the register read operation is complete, and returns the data from the register read. Wire this parameter through either a shift register or a feedback node back to the read completion parameter on the Process node of the Register Bus.


ready for input

A Boolean that indicates whether the node is ready to accept new input data in the next cycle. Use a Feedback Node to wire this parameter to the ready for output terminal of an upstream node.

Where This Node Can Run:

Desktop OS: none

FPGA: All devices

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