Table Of Contents

Global Registers (Clock-Driven Logic)

Last Modified: September 10, 2016

Sets/gets the global configuration values for the Configuration nodes by connecting it to the Register Bus.


register instruction

Specifies a read or write register instruction. This parameter is usually obtained from the register instruction parameter of the Process node in the Register Bus FPGA library. The source of this parameter defines the instances of the Register Bus library to which the Config library instance is wired, and is communicated from the host.


read completion

Indicates whether the register read operation is complete, and returns the data from the register read. Wire this parameter through either a shift register or a feedback node back to the read completion parameter on the Process node of the Register Bus.


ready for input

A Boolean that indicates whether the register read operation is complete.

Where This Node Can Run:

Desktop OS: none

FPGA: All devices

Recently Viewed Topics