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Read Completion Demux (9 outputs) (Clock-Driven Logic)

Last Modified: September 10, 2016

Routes an incoming read completion to the port that provided the register read instruction, when different instances of this library provide register instructions to the same destination subsystem. This node is designed to be used with the Register Instruction Arbiter node in this library.


Where This Node Can Run:

Desktop OS: none

FPGA: All devices

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