Configures the specified reference level.
This node performs the following actions to configure the specified reference level:
Register Bus object created by ni579x Open and used as the session handle for the NI-579x Configuration nodes.
Mixer to configure. Valid values are rx and tx.
Specifies the maximum power, in dBm, of the signals expected at the input terminal of the device. The RF signal path of the device is configured to maximize the dynamic range of the measurement relative to this power level.
Specifies the frequency the LO is tuned to for the measurement.
Specifies the amount of headroom to leave in the range of the ADC if the signal input to the device is at the reference level power. Leave enough headroom to avoid clipping or over range errors and DSP overflows.
Error conditions that occur before this node runs. Use this information to decide whether to bypass any functionality if this node receives errors from other nodes.
Specifies whether to calculate the I/Q impairment correction values. Set this parameter to FALSE if you are not using the I/Q impairment correction DSP blocks in the FPGA.
A set of data that describes the characteristics of this device that allow the node to calculate the proper attenuation and I/Q imbalance correction settings for the specified frequency. This data is stored in the EEPROM and can be retrieved using the ni579x Load Characterization Data (Single Channel) node. For the NI 5791, the Tx data is index 1 in the array of characterization data returned by the ni579x Load Characterization Data (Single Channel) node.
The Register Bus object created by ni579x Open and used as the session handle for the NI-579x Configuration nodes.
The peak-to-peak vertical range, in volts, of the device. You can use this value to scale binary data retrieved from the device to volts. This value assumes that the I/Q impairment correction values returned by this node are applied to the signal using the I/Q Impairment Correction DSP block in the FPGA.
The actual reference level the device is configured to. This value is the maximum power level that can be input to the device without exceeding the vertical range of the ADCs.
The values to apply to the I/Q Impairment Correction DSP block in the FPGA, in order to correct gain and phase imbalances in the mixer.
Information about errors or warnings that occurred during or before the execution of this node.
Where This Node Can Run:
Desktop OS: Windows
FPGA: Not supported