Table Of Contents

NI 5772 Pinout

Version:
    Last Modified: May 17, 2017

    Table 1. NI 5772 Front Panel Connectors
    Device Front Panel Connector Signal Description
    REF IN External Reference Clock input, 50 Ω, single-ended
    CLK IN External Sample Clock input, 50 Ω, single-ended
    AI 0 Analog input channel 0, 50 Ω, single-ended
    AI 1 Analog input channel 1, 50 Ω, single-ended
    TRIG Trigger input and output channel
    AUX I/O Digital I/O and PFI connector
    spd-note-caution
    Caution  

    To avoid permanent damage to the NI 5772, disconnect all signals connected to the NI 5772 before powering down the module, and connect signals only after the adapter module has been powered on by the FlexRIO FPGA module or Controller for FlexRIO.

    spd-note-caution
    Caution  

    Connections that exceed any of the maximum ratings of any connector on the NI 5772 can damage the device and the chassis. NI is not liable for any damage resulting from such connections.


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