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Aborts the opened and running FPGA VI on the FPGA target.
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Closes the reference to the FPGA VI.
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Specifies the capacity, or depth, in elements of the host-side FIFO of the DMA channel.
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Controls power to a Flex-RIO adapter module.
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Links a writer and reader and creates a stream between them.
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Unlinks the writer and reader and purges data from the stream.
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Immediately disables a stream without flushing data from the writer.
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Downloads the specified FPGA VI or bitfile to the FPGA target.
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Casts the input reference to the specified data type.
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Prepares the stream for data transmission.
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Immediately flushes data from the writer and disables the stream.
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Returns the execution mode of the FPGA VI.
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Returns a reference to the P2P writer for the requested session.
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Returns a reference to the P2P reader for the requested session.
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Returns status operators that reflect the current state of the configured IO Module.
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Opens a reference to the build specification or bitfile associated with an FPGA VI and the FPGA target you specify.
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Reads elements of the DMA FIFO from the host-side of the DMA channel.
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Reads and writes values to controls or indicators in the FPGA VI on the FPGA target.
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Use this VI to cause the selected NI FlexRIO device to redetect the adapter module.
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Reserves the specified PXI trigger line.
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Aborts and resets the FPGA VI on the FPGA target to the default state of the VI.
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Runs the FPGA VI on the FPGA target.
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Begins DMA data transfer between the FPGA target and the host computer.
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Stops the DMA data transfer between the FPGA target and the host computer.
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Gets (reads) properties of a P2P stream.
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Unreserves the specified PXI trigger line.
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Writes elements to the DMA FIFO from the host VI.