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Buffered (Sample Clock) Edge Counting

    Last Modified: February 26, 2018

    With buffered edge counting (edge counting using a sample clock), the counter counts the number of edges on the Source input after the counter is armed. The value of the counter is sampled on each active edge of a sample clock and stored in the FIFO. The sampled values will be transferred to host memory using a high-speed data stream.

    The count values returned are the cumulative counts since the counter armed event. That is, the sample clock does not reset the counter. You can configure the counter to sample on the rising or falling edge of the sample clock.

    The following figure shows an example of buffered edge counting. Notice that counting begins when the counter is armed, which occurs before the first active edge on Sample Clock.

    Figure 1. Buffered (Sample Clock) Edge Counting

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