PCI Express was introduced to overcome the limitations of the original PCI bus, which operated at 33 MHz and 32 bits with a peak theoretical bandwidth of 132 MB/s. It uses a shared bus topology, where bus bandwidth is divided among multiple devices, to enable communication among the different devices on the bus. Over time, devices have evolved and become more bandwidth-hungry. As a result, bandwidth across the PCI bus has become limited due to these bandwidth-hungry devices starving other devices on the same shared bus.
The most notable PCI Express advancement over PCI is its point-to-point bus topology. The shared bus used for PCI is replaced with a shared switch, which gives each device its own direct access to the bus. Unlike PCI, which divides bandwidth between all devices on the bus, PCI Express provides each device with its own dedicated data pipeline. Data is sent serially in packets through pairs of transmit and receive signals called lanes, which enable 250 MB/s bandwidth per direction, per lane. Multiple lanes can be grouped together into x1 (“by one”), x2, x4, x8, x12, and x16 lane widths to increase bandwidth to the slot and achieve up to 4 GB/s total throughput.
Figure 1. PCI Express provides dedicated, scalable bandwidth with up to 30 times the bandwidth of traditional PCI.
Applications such as data acquisition and waveform generation require sufficient bandwidth to ensure that data can be transferred to memory fast enough without being lost or overwritten. With PCI Express, because data bandwidth is dramatically improved compared to legacy buses, data is streamed faster and the amount of required onboard memory is minimized. Using data storage technologies, such as RAID (Redundant Array of Independent Disks), large amounts of data produced by high-speed devices can be continuously streamed and stored for further analysis. The PCI Express bus has additionally served as the foundation for new bus technologies such as PXI Express, which have brought the same express technology advantages to the PXI form factor.