Archived: NI 6533 and NI 6534 High-Speed Digital Considerations
Updated Feb 4, 2020
NI does not actively maintain this document.
This content provides support for older products and technology, so you may notice outdated links or obsolete information about operating systems or other relevant products.
At speeds greater than 1 MS/s, keep in mind the following four considerations:
NOTE: This discussion is applicable only to the NI 6533 and NI 6534
Knowing which mode the transfers are using is especially important. Although burst mode offers a higher transfer rate than pattern generation, burst mode is a handshaking mode, so data may not be transferred according to a clock. Burst mode transfers may pause while the device transfers data. At low speeds, this pause is generally not noticeable, but if the external device is expecting a clocked mode, data points may be missed at higher rates. If clocked I/O is required, use pattern I/O; otherwise, burst mode is acceptable.
The device can generally acquire data at a faster rate with a finite acquisition, rather than continuously, because the device is more likely to be able to maximize its use of the bus. Please note that the tables in the catalog and manual are benchmarks -- not specifications, and are for 100,000 point transfers -- NOT continuous transfers. (For more details on the benchmark, see the footnotes in the catalog and manual.)
The third consideration is the size of the device FIFO. The DIO-32HS has a small FIFO (due to space constraints on the DAQ-DIO chip), so at high speeds it must empty this FIFO (over the data bus) frequently. In fact, this must be done so frequently that eventually the device would need to constantly control the bus. However, the bus has other traffic -- video, ethernet, disk controller, and so on -- that must use the bus. Also, there is a certain computer-dependent point (for continuous mode, it is generally about 1-3 MS/s with pattern I/O, 3 - 5 MS/s with burst mode) at which the device will return buffer overflow or underflow errors because it cannot control the bus often enough to transfer the data.
Finally, consider the signal. Using an unshielded cable can generate noise on the signal, or the signal itself may not be clean. Noise on the PCLK signal can be especially problematic because signal noise may generate spurious points of data.