LabVIEW 2009 FPGA Module Readme

June 2009

This file contains important information about the LabVIEW FPGA Module.


You can install all of your LabVIEW products—including the FPGA Module–using the LabVIEW 2009 Platform DVDs. You can find installation instructions for the FPGA Module along with activation instructions in the following locations:

  • LabVIEW FPGA Module Release and Upgrade Notes, which are available in your FPGA Module software kit or online at
  • LabVIEW Release Notes, which are available in your LabVIEW software kit.
  • LabVIEW 2009 Platform DVDs Readme, which is available on the top-level of LabVIEW Platform DVD 1.

To request additional LabVIEW 2009 Platform DVDs, refer to the National Instruments Web site.

You must install TCP. Most computers have TCP installed. If TCP is not installed, LabVIEW returns the Error Contacting Server message when it attempts to contact the LabVIEW FPGA Compile Server.

You must install LabVIEW 2009 and the FPGA Module 2009 before you mass compile existing VIs. If you mass compile existing VIs before you install the FPGA Module 2009, the following VIs might have mutation issues: Sine Wave Generator, Discrete Delay, Quantizer, Look-Up Table 1D, Analog Period Measurement, Butterworth Filter, FIFO Read, FIFO Write, HDL Interface Node, Open FPGA VI Reference, Read/Write Control, Call VI, Close FPGA VI Reference, Invoke Method, Up Cast, FPGA I/O Method Node, and FPGA I/O Property Node.

Known Issues

You can access the software and documentation known issues list online. Refer to the National Instruments Web site for an up-to-date list of known issues in the FPGA Module.

Bug Fixes

The following items are the IDs and titles of a subset of issues fixed in the FPGA Module 2009.

Bug ID Fixed Issue
150489 LabVIEW hangs when adding a CLIP declaration path that contains an ampersand (&).
132674 LabVIEW crashes when right-clicking on a VI under a networked computer target.
124795 Global variables not updating correctly on FPGA VI.
123925 Compilation error when using FIFO Clear in a different domain than FIFO Write and Read.
53298 FPGA emulation error when using NI-9853 and CompactRIO.
99457 Multiple FIFO accessors not allowed in a state machine architecture inside a single-cycle Timed Loop.
47652 Compilation time error with reentrant VIs in a single-cycle Timed Loop.


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