This document contains the LabVIEW NXG 5.0 FPGA Module known issues that were discovered before and since the release of LabVIEW NXG 5.0 FPGA Module. Known issues are performance issues or technical bugs that NI has acknowledged exist within this version of the product.
Not every issue known to NI appears on this list; it is intended to show the most severe and common issues that you may encounter and provide workarounds when possible. Other technical issues that you may encounter could occur through normal product use or system compatibility issues. You may find more information on these issues in NI’s Product Documentation, Knowledgebase, or Community.
Renaming an FPGA Application Breaks Associated Open FPGA VI Reference Nodes Referencing That Application
Renaming an FPGA Application breaks associated Open FPGA VI Reference nodes referencing that application because the 'Rename and Update' dialog fails to automatically update the reference to use the new name.
Manually point the Open FPGA VI Reference to the correct FPGA Application.
LabVIEW NXG FPGA Module 3.0
Oct 28, 2018
Errors outside of Clock-Driven Logic can incorrectly refer to the source of the error as an Optimized FPGA VI.
Some errors outside of Clock-Driven Logic can incorrectly refer to "Optimized FPGA VI" as the source of the error. One example is an uninitialized shift register on a For Loop.
Double-click the error in the Errors and Warnings tab to be taken to the actual error source.
LabVIEW NXG FPGA Module 4.0
Apr 3, 2020
LabVIEW FPGA I/O Nodes cannot be used in LabVIEW Classes.
Using I/O Nodes in LabVIEW FPGA Classes will result in an error at edit time stating that I/O Nodes cannot be used in class member VIs.
There is currently no known workaround for this issue.
LabVIEW NXG FPGA Module 5.0
May 15, 2020
Final Time Issue Listed
Issues found in this section will not be listed in future known issues documents for this product.