VI Analyzer Configuration for STS VIs and LLBs

Overview

Use the LabVIEW VI Analyzer Toolkit to improve your maintainability and performance of VIs. The following VI Analyzer configuration is designed specifically for VIs in a typical STS application that uses the NI STS Core Development Software 17.0.

Contents

Use the LabVIEW VI Analyzer Toolkit to improve your maintainability and performance of VIs. You can join the VI Analyzer Enthusiasts community group here.

The following VI Analyzer configuration is designed specifically for VIs in a typical STS application that uses the NI STS Core Development Software 17.0. Use this file as a starting point to modify for your application. 

The VI Analyzer Toolkit is licensed with LabVIEW Professional, but is a separate install. If you do not have LabVIEW Professional, you can purchase the toolkit, or choose to evaluate it. You can download the VI Analyzer Toolkit installer here. Note that LabVIEW must be installed before you can install the toolkit. 

 

Implementing the Configuration File

  1. Download the attached .cfg file and place the file in the top-level directory of your project.
  2. Open LabVIEW.
  3. Select Tools>>VI Analyzer>>Analyze VIs…
  4. Select “Load a previously saved analysis configuration file,” and click Next.
  5. Navigate to the location where you have saved the attached .cfg file.
  6. Select the Top-Level items that you want to test and click Next to launch the following dialog box:

 

Note: If you do not see the TestStand Semiconductor Module category, install, repair, or reinstall TestStand Semiconductor Module (TSM).

Block Diagram

                Performance

      • Coercion Dots – Avoid coercion dots when possible. You can adjust the “Maximum Number” to fit your needs. The default values are 10 for the Block Diagram and 2 for a Single Wire.
      • Enable Debugging – If you have not completed debugging the code, keep debugging enabled. Otherwise disable debugging by removing the checkmark for this option to increase performance If  you are building an application and enable debugging, this will reduce the application's performance and increase the file size.
      • Prepend Scalar With Build Array –  Disable this test because some code might require it and using this technique does not significantly affect performance.
      •  Value Property Usage – This is disabled because the use of property nodes may be necessary for an application.
      • Wait in While Loop – This is excluded, because NI recommends using waits in While Loops is recommended and it is primarily UI focused.

Style

Enable all the tests except the following:

      • Node Density – This test is disabled because the results might be difficult to interpret and implement.

Warnings

Enable all the tests except the following:

      • For Loop Iteration Count – In TSM, For Loops can be indexed by multiple input arrays. Therefore, this test reports errors that are very difficult to eliminate.
      • Typedef Cluster Constants – This test is disabled because it is not necessary for VIs written in LabVIEW 2016.

Complexity Metrics

These tests are designed to reduce or highlight the complexity of your VIs. Disable all tests, except the “Depth of Nesting Structures” test, because TSM VIs are typically large and complex VIs with appropriate structure, making the results of these tests less useful than other tests.

Documentation

Enable the appropriate tests to enforce more stringent documentation guidelines for your application.

Front Panel

SubVI and User Interface

TSM VIs typically are not used as user interfaces. However, the enabled tests are best practices for all VIs, even ones that are not user interfaces.

General

File Properties

      • SubVI and TypeDef Locations – this test is disabled because TSM VIs use subVIs that exist in vi.lib or instr.lib, which makes passing this test difficult or impossible.

Icon and Connector Pane

      • Full Connector Pane is the only disabled test because full connecter panes are likely in TSM applications and do not ultimately have an effect on VI performance.
      • Terminal Connection Type – “^[Rr}ef” and “^[Ee]rror” are included as default. “[Cc]ontext” has been added as a required option because of the TSM context.

VI Properties

      • Built Application compatibility – this is unchecked because TSM VIs are not usually built into applications.
      • Platform Portability – This test is relevant if your VIs will be used with multiple operating systems. The test was excluded because TSM only works with Windows.
      • Toolkit Usage – Adjust this test to accommodate the toolkits that are used in your VIs
      • VI Lock State – unchecked because it is assumed that you will not be locking VIs.

TestStand Semiconductor Module

NI recommends that you enable  For Loop Error Handling test because it returns a failure for a For Loop that does not implement proper error handling to account for zero iterations.

VI Metrics

Enable each of these configurable tests because each one improves the readability and performance of VIs.  You can change the values to meet the needs of your application.