NI-RIO 14.5 Known Issues

Overview

This document contains the NI-RIO 14.5 known issues that were discovered before and since the release of NI-RIO 14.0.1. Not every issue known to NI will appear on this list; it is intended to only show the severe and more common issues that can be encountered. Each issue appears as a row in the table and includes an issue title, a brief description of the problem, and any workarounds that might help resolve the issue. To help determine if issues have been added since the date of publish, these newly added issues will be in their own section at the top (if applicable). The workarounds that appear in the document are not always tested by NI and are not guaranteed to resolve the issue. If a workaround refers you to the NI KnowledgeBase, please visit www.ni.com/kb/ and enter that KB number in the search field to locate the specific document. The brief description given does not necessarily describe the problem in full detail, and it is expected that you might want more information on an issue. If you would like more information on an issue feel free to contact NI and referencing the ID number given in the document. You can contact us through any of the normal support channels including phone, email, or the discussion forums. See www.ni.com/contact to contact us. Also consider contacting us if you find a workaround for an issue that is not listed in the document so that we can add the workaround to the document.
ID Known Issue Affected LV Versions
518755 PXI Trigger lines 1 and 2 on the NI PXIe-782xR behave incorrectly 2014 SP1
498902 cRIO targets supported by Xilinx Vivado Compile Tools experience compilation failures due to timing violation errors when configured for Hybrid Interface mode 2014, 2014 SP1
519539 Bitfiles compiled using Xilinx Vivado Compile Tools may report skipped step or may appear to restart 2014 SP1
515003 LabVIEW FPGA Module 2014 with NI-RIO Device Drivers 14.5 fails to compile on cRIO-903x targets when compiling a bitfile using DMA FIFOs 2014
523452 Using DSA modules in LabVIEW FPGA does not prevent  implicit synchronization 2014, 2014 SP1

Known Issues with NI-RIO 14.0.1 and LabVIEW

ID Known Issues
518755

PXI Trigger lines 1 and 2 on the NI PXIe-782xR are swapped in NI-RIO Device Drivers 14.5               

Trigger lines for NI PXIe-782xR targets experience an incorrect behavior.  For more information, refer to the NI support document, KnowledgeBase 6VM9TKJQ: NI R Series Multifunction RIO 14.5.1 Patch.

Workaround:

Download and install the NI R Series Multifunction RIO 14.5.1 Patch (download link).

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498902

cRIO targets supported by Xilinx Vivado Compile Tools experience compilation failures due to timing violation errors when configured for Hybrid Interface mode 

When you are using the cRIO-906x and cRIO-903x configured in Hybrid Interface mode and try to compile using Xilinx Vivado Compile Tools 2013.4, the compilation always fails for the following modules: NI 9203, NI 9205, NI 9206, NI 9220, NI 9222, NI 9223, NI 9263, NI 9264, NI 9265, NI 9269. The compilation failure refers to a non-diagram component that is required in the design.

Workaround:

Refer to the NI support document, KnowledgeBase 6VJ7NUJQ: Timing Violations When Compiling Hybrid Mode Bitfile with Specific Modules Using Vivado Compilation Tools, for workaround details.

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518755

Bitfiles compiled using Xilinx Vivado Compile Tools 14 SP1 may report skipped step or may appear to restart

Several C Series modules might experience an issue in which timing is not being met when using the Xilinx Vivado Compile Tools with LabVIEW 2014 or LabVIEW 2014 SP1. This issue does not affect data integrity or sampling time of the module once compiled.

Workaround:

Refer to the NI support document, KnowledgeBase 6VJ7NUJQ: Timing Violations When Compiling Hybrid Mode Bitfile with Specific Modules Using Vivado Compilation Tools, for workaround details.

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515003

LabVIEW FPGA Module 2014 with NI-RIO Device Drivers 14.5 fails to compile on cRIO-903x targets when compiling a bitfile using DMA FIFOs

The compilation fails due to internal components not being declared. These components include: knidmahighspeedsinkbase, knidmahighspeedsinksize, knidmahighspeedsinkbase, and knidmahighspeedsinkbase.

Workaround:

Install the NI-RIO Device Drivers August 2014 Distribution or upgrade to LabVIEW FPGA Module 2014 SP1.

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523452

Using DSA modules in LabVIEW FPGA does not prevent  implicit synchronization

You might see error codes 65539 or 65582 when reading channels from two or more Dynamic Signal Acquisition (DSA) modules within the same I/O node.  With CompactRIO Module Support 14.0, at the start of compilation a check was performed to ensure DSA modules read within the same I/O node were synchronized with a master clock. This check  is disabled.

Workaround:

To avoid this warning or error, place a checkmark in the Export Onboard Clock checkbox in the module properties dialog box in the Project Explorer window. Place a checkmark in the Import Clock checkbox for any slave modules.

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Glossary of Terms

 

  • Bug ID - When an issue is reported to NI, you may be given this ID or find it on ni.com.  You may also find IDs posted by NI on the discussion forums or in KnowledgeBase articles.
  • Legacy ID – An older issue ID that refers to the same issue.  You may instead find this issue ID in older known issues documents.
  • Description - A few sentences which describe the problem. The brief description given does not necessarily describe the problem in full detail.
  • Workaround - Possible ways to work around the problem.
  • Reported Version - The earliest version in which the issue was reported.
  • Resolved Version - Version in which the issue was resolved or was no longer applicable. "N/A" indicates that the issue has not been resolved.
  • Date Added - The date the issue was added to the document (not the reported date).